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CUDA: CUDART < 11.7 workaround for __hmax, __hmax2 (#7019)
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@ -137,7 +137,8 @@
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#define STRINGIZE(...) STRINGIZE_IMPL(__VA_ARGS__)
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#define WARP_SIZE 32
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#define CUDART_HMAX 11070 // CUDA 11.7, min. ver. for which __hmax and __hmax2 are known to work (may be higher than needed)
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#define CUDART_HMAX 11070 // CUDA 11.7, min. ver. for which __hmax and __hmax2 are known to work (may be higher than needed)
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#define CUDART_HMASK 12000 // CUDA 12.0, min. ver. for half2 -> uint mask comparisons
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#define CC_PASCAL 600
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#define MIN_CC_DP4A 610 // minimum compute capability for __dp4a, an intrinsic for byte-wise dot products
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@ -293,20 +294,54 @@ static __device__ __forceinline__ float warp_reduce_max(float x) {
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return x;
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}
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static __device__ __forceinline__ half ggml_cuda_hmax(const half a, const half b) {
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#if !(defined(GGML_USE_HIPBLAS) && defined(__HIP_PLATFORM_AMD__))
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#if CUDART_VERSION >= CUDART_HMAX
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return __hmax(a, b);
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#else
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return __half2float(a) > __half2float(b) ? a : b;
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#endif // CUDART_VERSION >= CUDART_HMAX
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#else
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GGML_UNUSED(a);
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GGML_UNUSED(b);
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NO_DEVICE_CODE;
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#endif // !(defined(GGML_USE_HIPBLAS) && defined(__HIP_PLATFORM_AMD__)) && CUDART_VERSION < CUDART_HMAX
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}
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static __device__ __forceinline__ half2 ggml_cuda_hmax2(const half2 a, const half2 b) {
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#if !(defined(GGML_USE_HIPBLAS) && defined(__HIP_PLATFORM_AMD__))
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#if CUDART_VERSION >= CUDART_HMAX
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return __hmax2(a, b);
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#else
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half2 ret;
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reinterpret_cast<half&>(ret.x) = __low2float(a) > __low2float(b) ? __low2half(a) : __low2half(b);
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reinterpret_cast<half&>(ret.y) = __high2float(a) > __high2float(b) ? __high2half(a) : __high2half(b);
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return ret;
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#endif // CUDART_VERSION >= CUDART_HMAX
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#else
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GGML_UNUSED(a);
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GGML_UNUSED(b);
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NO_DEVICE_CODE;
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#endif // !(defined(GGML_USE_HIPBLAS) && defined(__HIP_PLATFORM_AMD__)) && CUDART_VERSION < CUDART_HMAX
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}
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static __device__ __forceinline__ half2 warp_reduce_max(half2 x) {
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#if !(defined(GGML_USE_HIPBLAS) && defined(__HIP_PLATFORM_AMD__)) && __CUDA_ARCH__ >= CC_PASCAL && CUDART_VERSION >= CUDART_HMAX
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#if !(defined(GGML_USE_HIPBLAS) && defined(__HIP_PLATFORM_AMD__)) && __CUDA_ARCH__ >= CC_PASCAL
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#pragma unroll
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for (int mask = 16; mask > 0; mask >>= 1) {
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x = __hmax2(x, __shfl_xor_sync(0xffffffff, x, mask, 32));
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x = ggml_cuda_hmax2(x, __shfl_xor_sync(0xffffffff, x, mask, 32));
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}
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return x;
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#else
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GGML_UNUSED(x);
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NO_DEVICE_CODE;
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#endif // !(defined(GGML_USE_HIPBLAS) && defined(__HIP_PLATFORM_AMD__)) && __CUDA_ARCH__ >= CC_PASCAL && CUDART_VERSION >= CUDART_HMAX
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#endif // !(defined(GGML_USE_HIPBLAS) && defined(__HIP_PLATFORM_AMD__)) && __CUDA_ARCH__ >= CC_PASCAL
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}
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#if CUDART_VERSION < 12000
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#if CUDART_VERSION < CUDART_HMASK
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static __device__ __forceinline__ uint32_t __hgt2_mask(const half2 a, const half2 b) {
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const uint32_t mask_low = 0x0000FFFF * (float( __low2half(a)) > float( __low2half(b)));
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const uint32_t mask_high = 0xFFFF0000 * (float(__high2half(a)) > float(__high2half(b)));
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@ -116,7 +116,7 @@ static __global__ void flash_attn_vec_ext_f16(
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sum2 = warp_reduce_sum(sum2);
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half sum = __low2half(sum2) + __high2half(sum2);
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sum += mask ? maskh[k_VKQ_0 + i_KQ] : __float2half(0.0f);
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kqmax_new = __hmax(kqmax_new, sum);
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kqmax_new = ggml_cuda_hmax(kqmax_new, sum);
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if (threadIdx.x == 0) {
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KQ[i_KQ] = sum;
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}
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@ -416,9 +416,9 @@ static __global__ void flash_attn_ext_f16(
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const int k = k0 + threadIdx.x;
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KQ2_tmp[k0/WARP_SIZE] += mask ? mask2[(j*ne11 + k_VKQ_0)/2 + k] : make_half2(0.0f, 0.0f);
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KQ_max_new = __hmax2(KQ_max_new, KQ2_tmp[k0/WARP_SIZE]);
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KQ_max_new = ggml_cuda_hmax2(KQ_max_new, KQ2_tmp[k0/WARP_SIZE]);
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}
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KQ_max_new = __half2half2(warp_reduce_max(__hmax(__low2half(KQ_max_new), __high2half(KQ_max_new))));
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KQ_max_new = __half2half2(warp_reduce_max(ggml_cuda_hmax(__low2half(KQ_max_new), __high2half(KQ_max_new))));
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const half2 diff = KQ_max_h2[j0/nwarps] - KQ_max_new;
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KQ_max_scale_h2[j0/nwarps] = h2exp(diff);
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const uint32_t ftz_mask = __hgt2_mask(diff, make_half2(SOFTMAX_FTZ_THRESHOLD, SOFTMAX_FTZ_THRESHOLD));
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