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Enable Fused-Multiply-Add (FMA) and F16C/CVT16 vector extensions on MSVC (#375)
* Enable Fused-Multiply-Add (FMA) instructions on MSVC __FMA__ macro does not exist in MSVC * Enable F16C/CVT16 vector extensions on MSVC __F16C__ macro does not exist in MSVC, but is implied with AVX2/AVX512 * MSVC cvt intrinsics * Add __SSE3__ macro for MSVC too because why not even though it's not currently used for anything when AVX is defined
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ggml.c
18
ggml.c
@ -79,6 +79,19 @@ static int sched_yield (void) {
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typedef void* thread_ret_t;
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#endif
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// __FMA__ and __F16C__ are not defined in MSVC, however they are implied with AVX2/AVX512
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#if defined(_MSC_VER) && (defined(__AVX2__) || defined(__AVX512F__))
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#ifndef __FMA__
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#define __FMA__
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#endif
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#ifndef __F16C__
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#define __F16C__
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#endif
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#ifndef __SSE3__
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#define __SSE3__
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#endif
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#endif
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#ifdef __HAIKU__
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#define static_assert(cond, msg) _Static_assert(cond, msg)
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#endif
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@ -172,8 +185,13 @@ typedef double ggml_float;
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#ifdef __F16C__
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#ifdef _MSC_VER
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#define GGML_COMPUTE_FP16_TO_FP32(x) _mm_cvtss_f32(_mm_cvtph_ps(_mm_cvtsi32_si128(x)))
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#define GGML_COMPUTE_FP32_TO_FP16(x) _mm_extract_epi16(_mm_cvtps_ph(_mm_set_ss(x), 0), 0)
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#else
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#define GGML_COMPUTE_FP16_TO_FP32(x) _cvtsh_ss(x)
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#define GGML_COMPUTE_FP32_TO_FP16(x) _cvtss_sh(x, 0)
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#endif
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#elif defined(__POWER9_VECTOR__)
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