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ggml : add Q5 WASM SIMD + GGML_FTYPE
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162
ggml.c
162
ggml.c
@ -330,7 +330,7 @@ static ggml_fp16_t table_exp_f16[1 << 16];
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// precomputed f32 table for f16 (256 KB)
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static float table_f32_f16[1 << 16];
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#if defined(__ARM_NEON)
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#if defined(__ARM_NEON) || defined(__wasm_simd128__)
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#define B1(c,s,n) 0x ## n ## c , 0x ## n ## s
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#define B2(c,s,n) B1(c,s,n ## c), B1(c,s,n ## s)
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#define B3(c,s,n) B2(c,s,n ## c), B2(c,s,n ## s)
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@ -1087,7 +1087,7 @@ static void quantize_row_q4_0(const float * restrict x, void * restrict vy, int
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const v128_t v = wasm_f32x4_mul(srcv[l], wasm_f32x4_splat(id));
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const v128_t vf = wasm_f32x4_add(v, wasm_f32x4_splat(8.5f));
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const v128_t vi = wasm_i32x4_trunc_sat_f32x4(vf);
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const v128_t vc = wasm_i32x4_min_u(vi, wasm_i32x4_splat(15));
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const v128_t vc = wasm_i32x4_min(vi, wasm_i32x4_splat(15));
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y[i].qs[2*l + 0] = wasm_i32x4_extract_lane(vc, 0) | (wasm_i32x4_extract_lane(vc, 1) << 4);
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y[i].qs[2*l + 1] = wasm_i32x4_extract_lane(vc, 2) | (wasm_i32x4_extract_lane(vc, 3) << 4);
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@ -3180,6 +3180,72 @@ static void ggml_vec_dot_q5_0_q8_0(const int n, float * restrict s, const void *
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}
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*s = vaddvq_f32(sumv);
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#elif defined(__wasm_simd128__)
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v128_t sumv = wasm_f32x4_splat(0.0f);
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uint64_t tmp[4];
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for (int i = 0; i < nb; ++i) {
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const block_q5_0 * restrict x0 = &x[i];
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const block_q8_0 * restrict y0 = &y[i];
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const v128_t m4b = wasm_i8x16_splat(0x0F);
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const v128_t s16b = wasm_i8x16_splat(0x10);
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// extract the 5th bit
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uint32_t qh;
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memcpy(&qh, x0->qh, sizeof(qh));
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tmp[0] = table_b2b_u[(qh >> 0) & 0xFF];
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tmp[1] = table_b2b_u[(qh >> 8) & 0xFF];
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tmp[2] = table_b2b_u[(qh >> 16) & 0xFF];
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tmp[3] = table_b2b_u[(qh >> 24) ];
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const v128_t qhl = wasm_v128_load(tmp + 0);
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const v128_t qhh = wasm_v128_load(tmp + 2);
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const v128_t v0 = wasm_v128_load(x0->qs);
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// 4-bit -> 8-bit
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const v128_t v0l = wasm_v128_and (v0, m4b);
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const v128_t v0h = wasm_u8x16_shr(v0, 4);
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// interleave
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const v128_t v0lz = wasm_v8x16_shuffle(v0l, v0h, 0, 16, 1, 17, 2, 18, 3, 19, 4, 20, 5, 21, 6, 22, 7, 23);
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const v128_t v0hz = wasm_v8x16_shuffle(v0l, v0h, 8, 24, 9, 25, 10, 26, 11, 27, 12, 28, 13, 29, 14, 30, 15, 31);
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// add high bit and sub 16
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const v128_t v0lf = wasm_i8x16_sub(wasm_v128_or(v0lz, qhl), s16b);
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const v128_t v0hf = wasm_i8x16_sub(wasm_v128_or(v0hz, qhh), s16b);
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// load y
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const v128_t v1l = wasm_v128_load(y0->qs);
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const v128_t v1h = wasm_v128_load(y0->qs + 16);
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// int8x16 -> int16x8
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const v128_t v0lfl = wasm_i16x8_extend_low_i8x16 (v0lf);
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const v128_t v0lfh = wasm_i16x8_extend_high_i8x16(v0lf);
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const v128_t v0hfl = wasm_i16x8_extend_low_i8x16 (v0hf);
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const v128_t v0hfh = wasm_i16x8_extend_high_i8x16(v0hf);
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const v128_t v1ll = wasm_i16x8_extend_low_i8x16 (v1l);
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const v128_t v1lh = wasm_i16x8_extend_high_i8x16(v1l);
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const v128_t v1hl = wasm_i16x8_extend_low_i8x16 (v1h);
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const v128_t v1hh = wasm_i16x8_extend_high_i8x16(v1h);
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const float x0d = GGML_FP16_TO_FP32(x0->d);
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// dot product
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sumv = wasm_f32x4_add(sumv, wasm_f32x4_mul(wasm_f32x4_convert_i32x4(
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wasm_i32x4_add(
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wasm_i32x4_add(wasm_i32x4_dot_i16x8(v0lfl, v1ll),
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wasm_i32x4_dot_i16x8(v0lfh, v1lh)),
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wasm_i32x4_add(wasm_i32x4_dot_i16x8(v0hfl, v1hl),
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wasm_i32x4_dot_i16x8(v0hfh, v1hh)))), wasm_f32x4_splat(x0d*y0->d)));
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}
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*s = wasm_f32x4_extract_lane(sumv, 0) + wasm_f32x4_extract_lane(sumv, 1) +
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wasm_f32x4_extract_lane(sumv, 2) + wasm_f32x4_extract_lane(sumv, 3);
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#elif defined(__AVX2__)
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// Initialize accumulator with zeros
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__m256 acc = _mm256_setzero_ps();
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@ -3311,6 +3377,77 @@ static void ggml_vec_dot_q5_1_q8_1(const int n, float * restrict s, const void *
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}
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*s = vaddvq_f32(sumv) + summs;
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#elif defined(__wasm_simd128__)
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v128_t sumv = wasm_f32x4_splat(0.0f);
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float summs = 0.0f;
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uint64_t tmp[4];
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for (int i = 0; i < nb; ++i) {
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const block_q5_1 * restrict x0 = &x[i];
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const block_q8_1 * restrict y0 = &y[i];
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summs += GGML_FP16_TO_FP32(x0->m) * (y0->s0 + y0->s1);
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const v128_t m4b = wasm_i8x16_splat(0x0F);
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// extract the 5th bit
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uint32_t qh;
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memcpy(&qh, x0->qh, sizeof(qh));
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tmp[0] = table_b2b_u[(qh >> 0) & 0xFF];
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tmp[1] = table_b2b_u[(qh >> 8) & 0xFF];
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tmp[2] = table_b2b_u[(qh >> 16) & 0xFF];
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tmp[3] = table_b2b_u[(qh >> 24) ];
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const v128_t qhl = wasm_v128_load(tmp + 0);
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const v128_t qhh = wasm_v128_load(tmp + 2);
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const v128_t v0 = wasm_v128_load(x0->qs);
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// 4-bit -> 8-bit
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const v128_t v0l = wasm_v128_and (v0, m4b);
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const v128_t v0h = wasm_u8x16_shr(v0, 4);
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static bool x = true;
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// interleave
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const v128_t v0lz = wasm_v8x16_shuffle(v0l, v0h, 0, 16, 1, 17, 2, 18, 3, 19, 4, 20, 5, 21, 6, 22, 7, 23);
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const v128_t v0hz = wasm_v8x16_shuffle(v0l, v0h, 8, 24, 9, 25, 10, 26, 11, 27, 12, 28, 13, 29, 14, 30, 15, 31);
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// add high bit
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const v128_t v0lf = wasm_v128_or(v0lz, qhl);
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const v128_t v0hf = wasm_v128_or(v0hz, qhh);
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// load y
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const v128_t v1l = wasm_v128_load(y0->qs);
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const v128_t v1h = wasm_v128_load(y0->qs + 16);
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// int8x16 -> int16x8
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const v128_t v0lfl = wasm_i16x8_extend_low_i8x16 (v0lf);
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const v128_t v0lfh = wasm_i16x8_extend_high_i8x16(v0lf);
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const v128_t v0hfl = wasm_i16x8_extend_low_i8x16 (v0hf);
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const v128_t v0hfh = wasm_i16x8_extend_high_i8x16(v0hf);
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const v128_t v1ll = wasm_i16x8_extend_low_i8x16 (v1l);
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const v128_t v1lh = wasm_i16x8_extend_high_i8x16(v1l);
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const v128_t v1hl = wasm_i16x8_extend_low_i8x16 (v1h);
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const v128_t v1hh = wasm_i16x8_extend_high_i8x16(v1h);
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const float x0d = GGML_FP16_TO_FP32(x0->d);
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// dot product
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sumv = wasm_f32x4_add(sumv, wasm_f32x4_mul(wasm_f32x4_convert_i32x4(
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wasm_i32x4_add(
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wasm_i32x4_add(wasm_i32x4_dot_i16x8(v0lfl, v1ll),
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wasm_i32x4_dot_i16x8(v0lfh, v1lh)),
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wasm_i32x4_add(wasm_i32x4_dot_i16x8(v0hfl, v1hl),
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wasm_i32x4_dot_i16x8(v0hfh, v1hh)))), wasm_f32x4_splat(x0d*y0->d)));
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}
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*s = wasm_f32x4_extract_lane(sumv, 0) + wasm_f32x4_extract_lane(sumv, 1) +
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wasm_f32x4_extract_lane(sumv, 2) + wasm_f32x4_extract_lane(sumv, 3) + summs;
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#elif defined(__AVX2__)
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// Initialize accumulator with zeros
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__m256 acc = _mm256_setzero_ps();
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@ -4057,6 +4194,27 @@ bool ggml_is_quantized(enum ggml_type type) {
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return GGML_IS_QUANTIZED[type];
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}
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enum ggml_type ggml_ftype_to_ggml_type(enum ggml_ftype ftype) {
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enum ggml_type wtype = GGML_TYPE_COUNT;
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switch (ftype) {
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case GGML_FTYPE_ALL_F32: wtype = GGML_TYPE_F32; break;
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case GGML_FTYPE_MOSTLY_F16: wtype = GGML_TYPE_F16; break;
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case GGML_FTYPE_MOSTLY_Q4_0: wtype = GGML_TYPE_Q4_0; break;
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case GGML_FTYPE_MOSTLY_Q4_1: wtype = GGML_TYPE_Q4_1; break;
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case GGML_FTYPE_MOSTLY_Q4_2: wtype = GGML_TYPE_Q4_2; break;
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case GGML_FTYPE_MOSTLY_Q5_0: wtype = GGML_TYPE_Q5_0; break;
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case GGML_FTYPE_MOSTLY_Q5_1: wtype = GGML_TYPE_Q5_1; break;
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case GGML_FTYPE_MOSTLY_Q8_0: wtype = GGML_TYPE_Q8_0; break;
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case GGML_FTYPE_UNKNOWN: wtype = GGML_TYPE_COUNT; break;
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case GGML_FTYPE_MOSTLY_Q4_1_SOME_F16: wtype = GGML_TYPE_COUNT; break;
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}
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GGML_ASSERT(wtype != GGML_TYPE_COUNT);
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return wtype;
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}
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static inline bool ggml_is_transposed(const struct ggml_tensor * tensor) {
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return tensor->nb[0] > tensor->nb[1];
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}
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17
ggml.h
17
ggml.h
@ -232,6 +232,20 @@ extern "C" {
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GGML_TYPE_COUNT,
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};
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// model file types
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enum ggml_ftype {
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GGML_FTYPE_UNKNOWN = -1,
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GGML_FTYPE_ALL_F32 = 0,
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GGML_FTYPE_MOSTLY_F16 = 1, // except 1d tensors
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GGML_FTYPE_MOSTLY_Q4_0 = 2, // except 1d tensors
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GGML_FTYPE_MOSTLY_Q4_1 = 3, // except 1d tensors
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GGML_FTYPE_MOSTLY_Q4_1_SOME_F16 = 4, // tok_embeddings.weight and output.weight are F16
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GGML_FTYPE_MOSTLY_Q4_2 = 5, // except 1d tensors
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GGML_FTYPE_MOSTLY_Q8_0 = 7, // except 1d tensors
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GGML_FTYPE_MOSTLY_Q5_0 = 8, // except 1d tensors
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GGML_FTYPE_MOSTLY_Q5_1 = 9, // except 1d tensors
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};
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// available tensor operations:
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enum ggml_op {
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GGML_OP_NONE = 0,
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@ -385,6 +399,9 @@ extern "C" {
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GGML_API bool ggml_is_quantized(enum ggml_type type);
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// TODO: temporary until model loading of ggml examples is refactored
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GGML_API enum ggml_type ggml_ftype_to_ggml_type(enum ggml_ftype ftype);
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// main
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GGML_API struct ggml_context * ggml_init(struct ggml_init_params params);
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