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@ -2253,13 +2253,15 @@ static bool ggml_metal_graph_compute(
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[encoder setBytes:&ne3 length:sizeof( int64_t) atIndex:26];
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[encoder setBytes:&ne3 length:sizeof( int64_t) atIndex:26];
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[encoder setBytes:&scale length:sizeof( float) atIndex:27];
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[encoder setBytes:&scale length:sizeof( float) atIndex:27];
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const int64_t nsg = 2; // simdgroups per threadgroup (a.k.a. warps)
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const int64_t nsg = 16; // simdgroups per threadgroup (a.k.a. warps)
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const int64_t nhptg = 4; // heads per threadgroup !! sync with kernel template arguments !!
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const int64_t nhptg = 2; // heads per threadgroup !! sync with kernel template arguments !!
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const int64_t nqptg = 2; // queries per threadgroup !! sync with kernel template arguments !!
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const int64_t nqptg = 2; // queries per threadgroup !! sync with kernel template arguments !!
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const int64_t ncpsg = 8;
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//const size_t smem = nqptg*(nhptg*ne00 + nsg*(nhptg*ne00 + 256))*(sizeof(float)/2);
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//const size_t smem = nqptg*(nhptg*ne00 + nsg*(nhptg*ne00 + 256))*(sizeof(float)/2);
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const size_t smem = nqptg*(nhptg*ne00 + nsg*(256))*(sizeof(float)/2);
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const size_t smem = nqptg*(nhptg*ne00 + nsg*(32*ncpsg))*(sizeof(float)/2);
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//printf("smem: %zu, max: %zu\n", smem, ctx->device.maxThreadgroupMemoryLength);
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GGML_ASSERT(smem <= ctx->device.maxThreadgroupMemoryLength);
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GGML_ASSERT(smem <= ctx->device.maxThreadgroupMemoryLength);
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[encoder setThreadgroupMemoryLength:smem atIndex:0];
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[encoder setThreadgroupMemoryLength:smem atIndex:0];
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237
ggml-metal.metal
237
ggml-metal.metal
@ -1995,7 +1995,7 @@ typedef void (flash_attn_ext_f16_t)(
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uint tiisg[[thread_index_in_simdgroup]],
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uint tiisg[[thread_index_in_simdgroup]],
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uint sgitg[[simdgroup_index_in_threadgroup]]);
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uint sgitg[[simdgroup_index_in_threadgroup]]);
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template<int64_t D, int64_t H, int64_t Q> // head size, heads per threadgroup, queries per threadgroup
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template<int64_t D, int64_t H, int64_t Q, int64_t C> // head size, heads per threadgroup, queries per threadgroup
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kernel void kernel_flash_attn_ext_f16(
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kernel void kernel_flash_attn_ext_f16(
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device const char * q,
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device const char * q,
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device const char * k,
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device const char * k,
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@ -2042,48 +2042,14 @@ kernel void kernel_flash_attn_ext_f16(
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return;
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return;
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}
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}
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// assume K and V are same shape
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const int64_t ne22 = ne12;
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const int64_t ne23 = ne13;
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const uint64_t nb21 = nb11;
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const uint64_t nb22 = nb12;
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const uint64_t nb23 = nb13;
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// broadcast
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const int64_t rk2 = ne02/ne12;
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const int64_t rk3 = ne03/ne13;
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const int64_t rv2 = ne02/ne22;
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const int64_t rv3 = ne03/ne23;
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// k indices
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const int64_t ik2 = iq2 / rk2;
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const int64_t ik3 = iq3 / rk3;
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// v indices
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const int64_t iv2 = iq2 / rv2;
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const int64_t iv3 = iq3 / rv3;
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const int64_t ir = iq3*ne02*ne01 + iq2*ne01 + iq1;
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device const float * mp[Q];
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for (int64_t j = 0; j < Q; ++j) {
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if (iq1 + j < ne01) {
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mp[j] = (device const float *) (mask + ((ir + j)%ne31)*nb31);
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} else {
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mp[j] = nullptr;
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}
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}
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const int64_t D4 = D/4;
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const int64_t D4 = D/4;
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const int64_t T = (H*D + nsg*(256)); // shared memory size per query in half
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const int64_t T = (H*D + nsg*(32*C)); // shared memory size per query in half
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const int64_t T4 = T/4; // shared memory size per query in half4
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const int64_t T4 = T/4; // shared memory size per query in half4
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threadgroup half4 * pq4 = (threadgroup half4 *) (shared + 0*H*D);
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threadgroup half4 * pq4 = (threadgroup half4 *) (shared + 0*H*D);
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threadgroup half * ss = (threadgroup half *) (shared + sgitg*(256) + 1*H*D);
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threadgroup half * ss = (threadgroup half *) (shared + sgitg*(32*C) + 1*H*D);
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threadgroup half4 * ss4 = (threadgroup half4 *) (shared + sgitg*(256) + 1*H*D);
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threadgroup half4 * ss4 = (threadgroup half4 *) (shared + sgitg*(32*C) + 1*H*D);
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const uint tiih = tiisg%tph; // thread index in head
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const uint tiih = tiisg%tph; // thread index in head
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const uint hiisg = tiisg/tph; // head index in simdgroup
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const uint hiisg = tiisg/tph; // head index in simdgroup
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@ -2116,98 +2082,122 @@ kernel void kernel_flash_attn_ext_f16(
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half S = { 0.0h };
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half S = { 0.0h };
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half M = { -INFINITY };
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half M = { -INFINITY };
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for (int64_t iic = 8*sgitg; iic < ne11; iic += 8*nsg) {
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{
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half mv[Q];
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// assume K and V are same shape
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const int64_t ne22 = ne12;
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const int64_t ne23 = ne13;
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bool skip = true;
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const uint64_t nb21 = nb11;
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for (int64_t j = 0; j < Q; ++j) {
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const uint64_t nb22 = nb12;
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mv[j] = mp[j][iic];
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const uint64_t nb23 = nb13;
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skip = skip && (mv[j] == -INFINITY);
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}
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if (skip) {
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continue;
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}
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for (int p = 0; p < 8; ++p) {
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// broadcast
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const int64_t ic = iic + p;
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const int64_t rk2 = ne02/ne12;
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const int64_t rk3 = ne03/ne13;
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device const half4 * pk4 = (device const half4 *) ((device char *) k + (ic*nb11 + ik2*nb12 + ik3*nb13));
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const int64_t rv2 = ne02/ne22;
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const int64_t rv3 = ne03/ne23;
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half s[Q] = { 0.0h };
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// k indices
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half4 pk4v[D4/tph];
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const int64_t ik2 = iq2 / rk2;
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const int64_t ik3 = iq3 / rk3;
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for (int64_t i = 0; i < D4/tph; ++i) {
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// v indices
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pk4v[i] = pk4[tph*i + tiih];
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const int64_t iv2 = iq2 / rv2;
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}
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const int64_t iv3 = iq3 / rv3;
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device const float * mp[Q];
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{
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const int64_t ir = iq3*ne02*ne01 + iq2*ne01 + iq1;
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for (int64_t j = 0; j < Q; ++j) {
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for (int64_t j = 0; j < Q; ++j) {
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for (int64_t i = 0; i < D4/tph; ++i) {
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if (iq1 + j < ne01) {
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s[j] += dot(pq4[j*T4 + hiisg*D4 + tph*i + tiih], pk4v[i]);
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mp[j] = (device const float *) (mask + ((ir + j)%ne31)*nb31);
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} else {
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mp[j] = nullptr;
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}
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}
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}
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for (int64_t iic = C*sgitg; iic < ne11; iic += C*nsg) {
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{
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bool skip = true;
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for (int64_t j = 0; j < Q; ++j) {
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skip = skip && (mp[j][iic] == -INFINITY);
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}
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if (skip) {
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continue;
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}
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}
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}
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}
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for (int64_t j = 0; j < Q; ++j) {
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for (int p = 0; p < C; ++p) {
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ss[j*T + 32*p + hiisg*tph + tiih] = s[j];
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const int64_t ic = iic + p;
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device const half4 * pk4 = (device const half4 *) ((device char *) k + (ic*nb11 + ik2*nb12 + ik3*nb13));
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for (int64_t j = 0; j < Q; ++j) {
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half4 s4 = 0.0h;
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for (int64_t i = 0; i < D4/tph; ++i) {
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s4 += pq4[j*T4 + hiisg*D4 + tph*i + tiih]*pk4[tph*i + tiih];
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}
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ss[j*T + 32*p + hiisg*tph + tiih] = s4.x + s4.y + s4.z + s4.w;
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}
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}
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simdgroup_barrier(mem_flags::mem_none);
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if (tiih < Q) {
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const int64_t j = tiih;
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for (int p = 0; p < C; ++p) {
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half4 s4 = 0.0h;
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for (int64_t i = 0; i < tph/4; ++i) {
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s4 += ss4[j*T4 + 8*p + hiisg*tph/4 + i];
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}
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half s = (s4.x + s4.y + s4.z + s4.w)*scale + mp[j][iic + p];
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const half m = M;
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M = max(M, s);
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const half ms = m == -INFINITY ? 0.0h : exp(m - M);
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const half vs = s == -INFINITY ? 0.0h : exp(s - M);
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S = S*ms + vs;
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ss[j*T + 32*p + 2*hiisg + 0] = ms;
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ss[j*T + 32*p + 2*hiisg + 1] = vs;
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}
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}
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simdgroup_barrier(mem_flags::mem_none);
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for (int p = 0; p < C; ++p) {
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const int64_t ic = iic + p;
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device const half4 * pv4 = (device const half4 *) ((device char *) v + (ic*nb21 + iv2*nb22 + iv3*nb23));
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for (int64_t j = 0; j < Q; ++j) {
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const half ms = ss[j*T + 32*p + 2*hiisg + 0];
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const half vs = ss[j*T + 32*p + 2*hiisg + 1];
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for (int64_t i = 0; i < D4/tph; ++i) {
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ps4[j][i] = ps4[j][i]*ms + pv4[tph*i + tiih]*vs;
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}
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}
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}
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}
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}
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}
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simdgroup_barrier(mem_flags::mem_none);
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if (tiih < Q) {
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if (tiih < Q) {
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const int64_t j = tiih;
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const int64_t j = tiih;
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for (int p = 0; p < 8; ++p) {
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ss[j*T + 2*hiisg + 0] = S;
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half4 s4 = 0.0h;
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ss[j*T + 2*hiisg + 1] = M;
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for (int64_t i = 0; i < tph/4; ++i) {
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s4 += ss4[j*T4 + 8*p + hiisg*tph/4 + i];
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}
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half s = (s4.x + s4.y + s4.z + s4.w)*scale + mp[j][iic + p];
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const half m = M;
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M = max(M, s);
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const half ms = m == -INFINITY ? 0.0h : exp(m - M);
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const half vs = s == -INFINITY ? 0.0h : exp(s - M);
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S = S*ms + vs;
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ss[j*T + 32*p + 2*hiisg + 0] = ms;
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ss[j*T + 32*p + 2*hiisg + 1] = vs;
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}
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}
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}
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simdgroup_barrier(mem_flags::mem_none);
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for (int64_t i = 0; i < D4/tph; ++i) {
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half4 pv4v[8];
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for (int p = 0; p < 8; ++p) {
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const int64_t ic = iic + p;
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device const half4 * pv4 = (device const half4 *) ((device char *) v + (ic*nb21 + iv2*nb22 + iv3*nb23));
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pv4v[p] = pv4[tph*i + tiih];
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}
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for (int64_t j = 0; j < Q; ++j) {
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for (int p = 0; p < 8; ++p) {
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const half ms = ss[j*T + 32*p + 2*hiisg + 0];
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const half vs = ss[j*T + 32*p + 2*hiisg + 1];
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ps4[j][i] = ps4[j][i]*ms + pv4v[p]*vs;
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}
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}
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}
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}
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if (tiih < Q) {
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const int64_t j = tiih;
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ss[j*T + 2*hiisg + 0] = S;
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ss[j*T + 2*hiisg + 1] = M;
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}
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}
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threadgroup_barrier(mem_flags::mem_threadgroup);
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threadgroup_barrier(mem_flags::mem_threadgroup);
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@ -2260,11 +2250,11 @@ kernel void kernel_flash_attn_ext_f16(
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if (sgitg == 0) {
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if (sgitg == 0) {
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for (int64_t j = 0; j < Q; ++j) {
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for (int64_t j = 0; j < Q; ++j) {
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const half S0 = ss[j*T + 2*hiisg + 0];
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const half S0 = ss[j*T + 2*hiisg + 0];
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const half S1 = ss[j*T + sg*(256) + 2*hiisg + 0];
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const half S1 = ss[j*T + sg*(32*C) + 2*hiisg + 0];
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const half M0 = ss[j*T + 2*hiisg + 1];
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const half M0 = ss[j*T + 2*hiisg + 1];
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const half M1 = ss[j*T + sg*(256) + 2*hiisg + 1];
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const half M1 = ss[j*T + sg*(32*C) + 2*hiisg + 1];
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M = max(M0, M1);
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M = max(M0, M1);
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@ -2279,7 +2269,6 @@ kernel void kernel_flash_attn_ext_f16(
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}
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}
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for (int64_t i = 0; i < D4/tph; ++i) {
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for (int64_t i = 0; i < D4/tph; ++i) {
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//ps4[j*T4 + hiisg*D4 + tph*i + tiih] = ps4[j*T4 + hiisg*D4 + tph*i + tiih]*ms0 + ps4[j*T4 + sg*(256)/4 + hiisg*D4 + tph*i + tiih]*ms1;
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ps4[j][i] = ps4[j][i]*ms0 + pq4[j*T4 + hiisg*D4 + tph*i + tiih]*ms1;
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ps4[j][i] = ps4[j][i]*ms0 + pq4[j*T4 + hiisg*D4 + tph*i + tiih]*ms1;
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}
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}
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}
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}
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@ -2292,7 +2281,6 @@ kernel void kernel_flash_attn_ext_f16(
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for (int64_t j = 0; j < Q; ++j) {
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for (int64_t j = 0; j < Q; ++j) {
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S = ss[j*T + 2*hiisg + 0];
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S = ss[j*T + 2*hiisg + 0];
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for (int64_t i = 0; i < D4/tph; ++i) {
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for (int64_t i = 0; i < D4/tph; ++i) {
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//ps4[j*T4 + hiisg*D4 + tph*i + tiih] = ps4[j*T4 + hiisg*D4 + tph*i + tiih]/S;
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ps4[j][i] = ps4[j][i]/S;
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ps4[j][i] = ps4[j][i]/S;
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}
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}
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}
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}
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@ -2305,16 +2293,15 @@ kernel void kernel_flash_attn_ext_f16(
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if (sgitg == 0) {
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if (sgitg == 0) {
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for (int64_t j = 0; j < Q && iq1 + j < ne01; ++j) {
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for (int64_t j = 0; j < Q && iq1 + j < ne01; ++j) {
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for (int64_t i = 0; i < D4/tph; ++i) {
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for (int64_t i = 0; i < D4/tph; ++i) {
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//dst4[(iq3*ne2*ne1 + iq2 + (iq1 + j)*ne1)*D4 + tph*i + tiih] = (float4) ps4[j*T4 + hiisg*D4 + tph*i + tiih];
|
|
||||||
dst4[(iq3*ne2*ne1 + iq2 + (iq1 + j)*ne1)*D4 + tph*i + tiih] = (float4) ps4[j][i];
|
dst4[(iq3*ne2*ne1 + iq2 + (iq1 + j)*ne1)*D4 + tph*i + tiih] = (float4) ps4[j][i];
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
template [[host_name("kernel_flash_attn_ext_f16_h64" )]] kernel flash_attn_ext_f16_t kernel_flash_attn_ext_f16<64, 4, 2>;
|
template [[host_name("kernel_flash_attn_ext_f16_h64" )]] kernel flash_attn_ext_f16_t kernel_flash_attn_ext_f16<64, 2, 2, 8>;
|
||||||
template [[host_name("kernel_flash_attn_ext_f16_h80" )]] kernel flash_attn_ext_f16_t kernel_flash_attn_ext_f16<80, 4, 2>;
|
template [[host_name("kernel_flash_attn_ext_f16_h80" )]] kernel flash_attn_ext_f16_t kernel_flash_attn_ext_f16<80, 2, 2, 8>;
|
||||||
template [[host_name("kernel_flash_attn_ext_f16_h128")]] kernel flash_attn_ext_f16_t kernel_flash_attn_ext_f16<128, 4, 2>;
|
template [[host_name("kernel_flash_attn_ext_f16_h128")]] kernel flash_attn_ext_f16_t kernel_flash_attn_ext_f16<128, 2, 2, 8>;
|
||||||
|
|
||||||
kernel void kernel_cpy_f16_f16(
|
kernel void kernel_cpy_f16_f16(
|
||||||
device const half * src0,
|
device const half * src0,
|
||||||
|
Loading…
Reference in New Issue
Block a user