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metal : improve decoding speed for batches of 2-16
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f1782c68de
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22
ggml-metal.m
22
ggml-metal.m
@ -993,6 +993,26 @@ void ggml_metal_graph_compute(
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uint gqa = ne12/ne02;
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GGML_ASSERT(ne03 == ne13);
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// find the break-even point where the matrix-matrix kernel becomes more efficient compared
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// to the matrix-vector kernel. the numbers below are measure on M2 Ultra
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// not sure if this translates across all chips
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int ne11_mm_min = 1;
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switch (src0t) {
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case GGML_TYPE_F16: ne11_mm_min = 2; break;
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case GGML_TYPE_Q8_0: ne11_mm_min = 7; break;
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case GGML_TYPE_Q2_K: ne11_mm_min = 15; break;
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case GGML_TYPE_Q3_K: ne11_mm_min = 7; break;
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case GGML_TYPE_Q4_0:
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case GGML_TYPE_Q4_1: ne11_mm_min = 15; break;
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case GGML_TYPE_Q4_K: ne11_mm_min = 11; break;
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case GGML_TYPE_Q5_0: // not tested yet
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case GGML_TYPE_Q5_1: ne11_mm_min = 13; break; // not tested yet
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case GGML_TYPE_Q5_K: ne11_mm_min = 7; break;
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case GGML_TYPE_Q6_K: ne11_mm_min = 7; break;
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default: ne11_mm_min = 1; break;
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}
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// for now the matrix-matrix multiplication kernel only works on A14+/M1+ SoCs
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// AMD GPU and older A-chips will reuse matrix-vector multiplication kernel
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if (!ggml_is_transposed(src0) &&
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@ -1000,7 +1020,7 @@ void ggml_metal_graph_compute(
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src1t == GGML_TYPE_F32 &&
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[ctx->device supportsFamily:MTLGPUFamilyApple7] &&
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ne00%32 == 0 &&
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ne11 > 2) {
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ne11 > ne11_mm_min) {
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switch (src0->type) {
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case GGML_TYPE_F32: [encoder setComputePipelineState:ctx->pipeline_mul_mm_f32_f32]; break;
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case GGML_TYPE_F16: [encoder setComputePipelineState:ctx->pipeline_mul_mm_f16_f32]; break;
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