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wip : template for rows per warp
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@ -2252,14 +2252,15 @@ static bool ggml_metal_graph_compute(
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[encoder setBytes:&ne3 length:sizeof( int64_t) atIndex:26];
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[encoder setBytes:&scale length:sizeof( float) atIndex:27];
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const int64_t nwarps = 4;
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const int64_t nwarps = 8;
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const int64_t nhpw = 4; // heads per warp
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const size_t smem = nwarps*(2*4*ne00 + 128)*(sizeof(float)/2);
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const size_t smem = nwarps*(2*nhpw*ne00 + 128)*(sizeof(float)/2);
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GGML_ASSERT(smem <= ctx->device.maxThreadgroupMemoryLength);
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[encoder setThreadgroupMemoryLength:smem atIndex:0];
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[encoder dispatchThreadgroups:MTLSizeMake(ne01, (ne02 + 4*nwarps - 1)/(4*nwarps), ne03) threadsPerThreadgroup:MTLSizeMake(32*nwarps, 1, 1)];
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[encoder dispatchThreadgroups:MTLSizeMake(ne01, (ne02 + nhpw*nwarps - 1)/(nhpw*nwarps), ne03) threadsPerThreadgroup:MTLSizeMake(32*nwarps, 1, 1)];
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} break;
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case GGML_OP_DUP:
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case GGML_OP_CPY:
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@ -1995,7 +1995,7 @@ typedef void (flash_attn_ext_f16_t)(
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uint tiisg[[thread_index_in_simdgroup]],
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uint sgitg[[simdgroup_index_in_threadgroup]]);
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template<int64_t D> // head size
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template<int64_t D, int64_t R> // head size, rows per warp
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kernel void kernel_flash_attn_ext_f16(
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device const char * q,
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device const char * k,
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@ -2036,9 +2036,10 @@ kernel void kernel_flash_attn_ext_f16(
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//const int64_t iq1 = tgpig[0]*N_SIMDWIDTH + tiisg;
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const uint nsg = ntg.x/N_SIMDWIDTH; // number of simdgroups
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const uint tph = N_SIMDWIDTH/R; // threads per head
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const int64_t iq3 = tgpig[2];
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const int64_t iq2 = tgpig[1]*(4*nsg) + 4*sgitg + tiisg/8;
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const int64_t iq2 = tgpig[1]*(R*nsg) + R*sgitg + tiisg/tph;
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const int64_t iq1 = tgpig[0];
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if (iq2 >= ne02) {
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@ -2140,18 +2141,18 @@ kernel void kernel_flash_attn_ext_f16(
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const int64_t D4 = D/4;
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threadgroup half4 * pq4 = (threadgroup half4 *) (shared + sgitg*(2*4*D + 128) );
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threadgroup half4 * ps4 = (threadgroup half4 *) (shared + sgitg*(2*4*D + 128) + 4*D);
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threadgroup half4 * ss4 = (threadgroup half4 *) (shared + sgitg*(2*4*D + 128) + 2*4*D);
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threadgroup half * ss = (threadgroup half *) (shared + sgitg*(2*4*D + 128) + 2*4*D);
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threadgroup half4 * pq4 = (threadgroup half4 *) (shared + sgitg*(2*R*D + 128) + 0*R*D);
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threadgroup half4 * ps4 = (threadgroup half4 *) (shared + sgitg*(2*R*D + 128) + 1*R*D);
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threadgroup half4 * ss4 = (threadgroup half4 *) (shared + sgitg*(2*R*D + 128) + 2*R*D);
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threadgroup half * ss = (threadgroup half *) (shared + sgitg*(2*R*D + 128) + 2*R*D);
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const uint tiih = tiisg%8; // thread index in head
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const uint hiisg = tiisg/8; // head index in simdgroup
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const uint tiih = tiisg%tph; // thread index in head
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const uint hiisg = tiisg/tph; // head index in simdgroup
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// load 8 heads from Q to shared memory
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for (int64_t i = 0; i < D4/8; ++i) {
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pq4[hiisg*D4 + 8*i + tiih] = ((device const half4 *) ((device const char *) q + (iq1*nb01 + iq2*nb02 + iq3*nb03)))[8*i + tiih];
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ps4[hiisg*D4 + 8*i + tiih] = 0.0h;
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// load R heads from Q to shared memory
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for (int64_t i = 0; i < D4/tph; ++i) {
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pq4[hiisg*D4 + tph*i + tiih] = ((device const half4 *) ((device const char *) q + (iq1*nb01 + iq2*nb02 + iq3*nb03)))[tph*i + tiih];
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ps4[hiisg*D4 + tph*i + tiih] = 0.0h;
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}
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simdgroup_barrier(mem_flags::mem_threadgroup);
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@ -2170,18 +2171,20 @@ kernel void kernel_flash_attn_ext_f16(
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half4 s4 = 0.0h;
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#pragma unroll(D4/8)
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for (int64_t i = 0; i < D4/8; ++i) {
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s4 += pk4[8*i + tiih] * pq4[hiisg*D4 + 8*i + tiih];
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for (int64_t i = 0; i < D4/tph; ++i) {
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s4 += pq4[hiisg*D4 + tph*i + tiih] * pk4[tph*i + tiih];
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}
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ss4[hiisg*8 + tiih] = s4;
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ss4[hiisg*tph + tiih] = s4;
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simdgroup_barrier(mem_flags::mem_threadgroup);
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if (tiih == 0) {
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s4 = ss4[8*hiisg + 0] + ss4[8*hiisg + 1] + ss4[8*hiisg + 2] + ss4[8*hiisg + 3] +
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ss4[8*hiisg + 4] + ss4[8*hiisg + 5] + ss4[8*hiisg + 6] + ss4[8*hiisg + 7];
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s4 = 0.0h;
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for (int64_t i = 0; i < tph; ++i) {
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s4 += ss4[hiisg*tph + i];
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}
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half s = (s4.x + s4.y + s4.z + s4.w)*scale + mv;
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@ -2203,9 +2206,8 @@ kernel void kernel_flash_attn_ext_f16(
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const half ms = ss[2*hiisg + 0];
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const half vs = ss[2*hiisg + 1];
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#pragma unroll(D4/8)
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for (int64_t i = 0; i < D4/8; ++i) {
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ps4[hiisg*D4 + 8*i + tiih] = ps4[hiisg*D4 + 8*i + tiih]*ms + pv4[8*i + tiih]*vs;
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for (int64_t i = 0; i < D4/tph; ++i) {
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ps4[hiisg*D4 + tph*i + tiih] = ps4[hiisg*D4 + tph*i + tiih]*ms + pv4[tph*i + tiih]*vs;
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}
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}
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@ -2226,14 +2228,14 @@ kernel void kernel_flash_attn_ext_f16(
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device float4 * dst4 = (device float4 *) dst;
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for (int64_t i = 0; i < D4/8; ++i) {
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dst4[(i3*ne2*ne1 + i2 + i1*ne1)*D4 + 8*i + tiih] = (float4) ps4[hiisg*D4 + 8*i + tiih];
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for (int64_t i = 0; i < D4/tph; ++i) {
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dst4[(i3*ne2*ne1 + i2 + i1*ne1)*D4 + tph*i + tiih] = (float4) ps4[hiisg*D4 + tph*i + tiih];
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}
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}
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template [[host_name("kernel_flash_attn_ext_f16_h64" )]] kernel flash_attn_ext_f16_t kernel_flash_attn_ext_f16<64>;
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template [[host_name("kernel_flash_attn_ext_f16_h80" )]] kernel flash_attn_ext_f16_t kernel_flash_attn_ext_f16<80>;
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template [[host_name("kernel_flash_attn_ext_f16_h128")]] kernel flash_attn_ext_f16_t kernel_flash_attn_ext_f16<128>;
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template [[host_name("kernel_flash_attn_ext_f16_h64" )]] kernel flash_attn_ext_f16_t kernel_flash_attn_ext_f16<64, 4>;
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template [[host_name("kernel_flash_attn_ext_f16_h80" )]] kernel flash_attn_ext_f16_t kernel_flash_attn_ext_f16<80, 4>;
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template [[host_name("kernel_flash_attn_ext_f16_h128")]] kernel flash_attn_ext_f16_t kernel_flash_attn_ext_f16<128, 4>;
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kernel void kernel_cpy_f16_f16(
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device const half * src0,
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