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https://github.com/ggerganov/llama.cpp.git
synced 2024-12-26 03:14:35 +00:00
metal : add poc for normalized Q4_0 and Q4_1
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@ -697,6 +697,9 @@ void ggml_metal_graph_compute(
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} break;
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case GGML_OP_MUL:
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{
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GGML_ASSERT(ne00 % 4 == 0);
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const int64_t nb = ne00/4;
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if (ggml_nelements(src1) == ne10) {
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// src1 is a row
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[encoder setComputePipelineState:ctx->pipeline_mul_row];
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@ -706,9 +709,9 @@ void ggml_metal_graph_compute(
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[encoder setBuffer:id_src0 offset:offs_src0 atIndex:0];
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[encoder setBuffer:id_src1 offset:offs_src1 atIndex:1];
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[encoder setBuffer:id_dst offset:offs_dst atIndex:2];
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[encoder setBytes:&ne00 length:sizeof(ne00) atIndex:3];
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[encoder setBytes:&nb length:sizeof(nb) atIndex:3];
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const int64_t n = ggml_nelements(dst);
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const int64_t n = ggml_nelements(dst)/4;
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[encoder dispatchThreadgroups:MTLSizeMake(n, 1, 1) threadsPerThreadgroup:MTLSizeMake(1, 1, 1)];
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} break;
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@ -4,17 +4,22 @@ using namespace metal;
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#define MAX(x, y) ((x) > (y) ? (x) : (y))
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#define Q4_0DM (1.0f/8.0f)
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#define Q4_0D(x) (((x)*Q4_0DM) / 127.0f)
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#define QK4_0 32
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#define QR4_0 2
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typedef struct {
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half d; // delta
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int8_t d; // delta
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uint8_t qs[QK4_0 / 2]; // nibbles / quants
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} block_q4_0;
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#define Q4_1DM (2.0f/15.0f)
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#define Q4_1MM (2.0f )
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#define Q4_1D(x) ( (((x) & 0xFF)*Q4_1DM) / 255.0f)
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#define Q4_1M(x) (-1.0f + (((x) >> 8)*Q4_1MM) / 255.0f)
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#define QK4_1 32
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typedef struct {
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half d; // delta
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half m; // min
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uint16_t dm;
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uint8_t qs[QK4_1 / 2]; // nibbles / quants
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} block_q4_1;
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@ -44,9 +49,9 @@ kernel void kernel_add_row(
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}
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kernel void kernel_mul(
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device const float * src0,
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device const float * src1,
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device float * dst,
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device const float4 * src0,
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device const float4 * src1,
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device float4 * dst,
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uint tpig[[thread_position_in_grid]]) {
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dst[tpig] = src0[tpig] * src1[tpig];
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}
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@ -54,12 +59,12 @@ kernel void kernel_mul(
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// assumption: src1 is a row
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// broadcast src1 into src0
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kernel void kernel_mul_row(
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device const float * src0,
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device const float * src1,
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device float * dst,
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constant int64_t & ne00,
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device const float4 * src0,
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device const float4 * src1,
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device float4 * dst,
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constant int64_t & nb,
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uint tpig[[thread_position_in_grid]]) {
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dst[tpig] = src0[tpig] * src1[tpig % ne00];
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dst[tpig] = src0[tpig] * src1[tpig % nb];
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}
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kernel void kernel_scale(
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@ -314,14 +319,18 @@ kernel void kernel_rms_norm(
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// we assume that the yl's have been multiplied with the appropriate scale factor
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// that corresponds to the missing bit shifts (1, 1/16, 1/256, 1/4096)
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inline float block_q_n_dot_y(device const block_q4_0 * qb_curr, float sumy, thread float * yl, int il) {
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float d = qb_curr->d;
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float d = Q4_0D(qb_curr->d);
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float2 acc = 0.f;
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device const uint16_t * qs = ((device const uint16_t *)qb_curr + 1 + il/2);
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device const uint8_t * qs = ((device const uint8_t *)qb_curr->qs + il);
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uint16_t qs16;
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for (int i = 0; i < 8; i+=2) {
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acc[0] += yl[i + 0] * (qs[i / 2] & 0x000F)
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+ yl[i + 1] * (qs[i / 2] & 0x0F00);
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acc[1] += yl[i + 8] * (qs[i / 2] & 0x00F0)
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+ yl[i + 9] * (qs[i / 2] & 0xF000);
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qs16 = qs[i+1];
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qs16 <<= 8;
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qs16 |= qs[i];
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acc[0] += yl[i + 0] * (qs16 & 0x000F)
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+ yl[i + 1] * (qs16 & 0x0F00);
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acc[1] += yl[i + 8] * (qs16 & 0x00F0)
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+ yl[i + 9] * (qs16 & 0xF000);
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}
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return d * (sumy * -8.f + acc[0] + acc[1]);
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}
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@ -331,9 +340,9 @@ inline float block_q_n_dot_y(device const block_q4_0 * qb_curr, float sumy, thre
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// we assume that the yl's have been multiplied with the appropriate scale factor
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// that corresponds to the missing bit shifts (1, 1/16, 1/256, 1/4096)
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inline float block_q_n_dot_y(device const block_q4_1 * qb_curr, float sumy, thread float * yl, int il) {
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float d = qb_curr->d;
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float m = qb_curr->m;
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device const uint16_t * qs = ((device const uint16_t *)qb_curr + 2 + il/2);
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float d = Q4_1D(qb_curr->dm);
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float m = Q4_1M(qb_curr->dm);
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device const uint16_t * qs = ((device const uint16_t *)qb_curr + 1 + il/2);
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float2 acc = 0.f;
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for (int i = 0; i < 8; i+=2) {
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acc[0] += yl[i + 0] * (qs[i / 2] & 0x000F)
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@ -1686,23 +1695,27 @@ void dequantize_f16(device const half4x4 * src, short il, thread type4x4 & reg)
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template <typename type4x4>
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void dequantize_q4_0(device const block_q4_0 *xb, short il, thread type4x4 & reg) {
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device const uint16_t * qs = ((device const uint16_t *)xb + 1);
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const half d = il ? (xb->d / 16.h) : xb->d;
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device const uint8_t * qs = ((device const uint8_t *)xb->qs);
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const half d = il ? (Q4_0D(xb->d) / 16.h) : Q4_0D(xb->d);
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const half m = il ? ( -8.h * 16.h) : -8.h;
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const ushort mask0 = il ? 0x00F0 : 0x000F;
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const ushort mask1 = il ? 0xF000 : 0x0F00;
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uint16_t qs16;
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for (int i=0;i<8;i++) {
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reg[i/2][2*(i%2)] = (((qs[i] & mask0) ) + m) * d;
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reg[i/2][2*(i%2)+1] = (((qs[i] & mask1) >> 8) + m) * d;
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qs16 = qs[2*i+1];
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qs16 <<= 8;
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qs16 |= qs[2*i];
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reg[i/2][2*(i%2)] = (((qs16 & mask0) ) + m) * d;
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reg[i/2][2*(i%2)+1] = (((qs16 & mask1) >> 8) + m) * d;
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}
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}
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template <typename type4x4>
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void dequantize_q4_1(device const block_q4_1 *xb, short il, thread type4x4 & reg) {
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device const uint16_t * qs = ((device const uint16_t *)xb + 2);
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const half d = il ? (xb->d / 16.h) : xb->d;
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const half m = xb->m;
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device const uint16_t * qs = ((device const uint16_t *)xb + 1);
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const half d = il ? (Q4_1D(xb->dm) / 16.h) : Q4_1D(xb->dm);
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const half m = Q4_1M(xb->dm);
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const ushort mask0 = il ? 0x00F0 : 0x000F;
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const ushort mask1 = il ? 0xF000 : 0x0F00;
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