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CANN: Support Ascend310P to accelerate F32 and F16 Model (#10216)
* CANN Support Ascend310P to accelerate F32 and F16 Model * Add compile option soc type macro ASCEND_310P to ggml-cann lib * Remove unused code * Remove the ascend soc_type hard code compile option in CMakelist.txt
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@ -3,6 +3,33 @@ if ("cann${CANN_INSTALL_DIR}" STREQUAL "cann" AND DEFINED ENV{ASCEND_TOOLKIT_HOM
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message(STATUS "CANN: updated CANN_INSTALL_DIR from ASCEND_TOOLKIT_HOME=$ENV{ASCEND_TOOLKIT_HOME}")
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endif()
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# Auto-detech Soc type and Soc version, if detect failed, will abort build
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set(SOC_VERSION "")
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function(detect_ascend_soc_type SOC_VERSION)
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execute_process(
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COMMAND bash -c "npu-smi info|awk -F' ' 'NF > 0 && NR==7 {print $3}'"
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OUTPUT_VARIABLE npu_info
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RESULT_VARIABLE npu_result
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OUTPUT_STRIP_TRAILING_WHITESPACE
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)
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if("${npu_info}" STREQUAL "" OR ${npu_result})
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message(FATAL_ERROR "Auto-detech ascend soc type failed, please specify manually or check ascend device working normally.")
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endif()
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set(${SOC_VERSION} "Ascend${npu_info}" PARENT_SCOPE)
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endfunction()
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if(NOT SOC_TYPE)
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detect_ascend_soc_type(SOC_VERSION)
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set(SOC_TYPE "${SOC_VERSION}")
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message(STATUS "CANN: SOC_VERSION auto-detected is:${SOC_VERSION}")
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else()
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string(TOLOWER ${SOC_TYPE} SOC_VERSION)
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endif()
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# Construct Soc specify compile option: ASCEND_#Soc_Major_SN. Such as ASCEND_910B, ASCEND310P.
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string(REGEX MATCH "[0-9]+[a-zA-Z]" SOC_TYPE_MAJOR_SN "${SOC_VERSION}")
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set(SOC_TYPE_COMPILE_OPTION "ASCEND_${SOC_TYPE_MAJOR_SN}")
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if (CANN_INSTALL_DIR)
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# Only Support Linux.
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if (NOT UNIX)
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@ -39,6 +66,8 @@ if (CANN_INSTALL_DIR)
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target_include_directories(ggml-cann PRIVATE . .. ${CANN_INCLUDE_DIRS})
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target_link_directories(ggml-cann PRIVATE ${CANN_INSTALL_DIR}/lib64)
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target_compile_definitions(ggml-cann PRIVATE "-D${SOC_TYPE_COMPILE_OPTION}")
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message(STATUS "CANN: CANN_INCLUDE_DIRS = ${CANN_INCLUDE_DIRS}")
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message(STATUS "CANN: CANN_LIBRARIES = ${CANN_LIBRARIES}")
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else()
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@ -2312,6 +2312,14 @@ void ggml_cann_get_rows(ggml_backend_cann_context& ctx, ggml_tensor* dst) {
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switch (src0->type) {
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case GGML_TYPE_F32:
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{
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#ifdef ASCEND_310P
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// Special operation for get_row_f32 kernel of 310P: clear the content of dest data buffer when row is not aligned to 32 bytes
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if ((src0->ne[0] % 8) != 0) {
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size_t dst_len = src1->ne[0] * src1->ne[1] * src1->ne[2] * src0->ne[0] * ggml_type_size(GGML_TYPE_F32);
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ACL_CHECK(aclrtMemset((char*)dst->data, dst_len, 0, dst_len));
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}
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#endif
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aclrtlaunch_ascendc_get_row_f32(
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24, ctx.stream(), src0->data, src1->data, dst->data,
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((ggml_tensor*)src0->extra)->ne,
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@ -2320,7 +2328,16 @@ void ggml_cann_get_rows(ggml_backend_cann_context& ctx, ggml_tensor* dst) {
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((ggml_tensor*)src1->extra)->nb, ((ggml_tensor*)dst->extra)->ne,
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((ggml_tensor*)dst->extra)->nb);
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break;
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}
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case GGML_TYPE_F16:
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{
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#ifdef ASCEND_310P
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// Special operation for get_row_f16 kernel of 310P: clear the content of dest data buffer when row is not aligned to 32 bytes
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if ((src0->ne[0] % 16) != 0) {
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size_t dst_len = src1->ne[0] * src1->ne[1] * src1->ne[2] * src0->ne[0] * ggml_type_size(GGML_TYPE_F32); // out is also f32, even input is f16
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ACL_CHECK(aclrtMemset((char*)dst->data, dst_len, 0, dst_len));
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}
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#endif
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aclrtlaunch_ascendc_get_row_f16(
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24, ctx.stream(), src0->data, src1->data, dst->data,
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((ggml_tensor*)src0->extra)->ne,
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@ -2329,6 +2346,7 @@ void ggml_cann_get_rows(ggml_backend_cann_context& ctx, ggml_tensor* dst) {
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((ggml_tensor*)src1->extra)->nb, ((ggml_tensor*)dst->extra)->ne,
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((ggml_tensor*)dst->extra)->nb);
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break;
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}
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case GGML_TYPE_Q4_0:
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aclrtlaunch_ascendc_get_row_q4_0(
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24, ctx.stream(), src0->data, src1->data, dst->data,
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@ -1,7 +1,3 @@
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if (NOT SOC_TYPE)
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set (SOC_TYPE "Ascend910B3")
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endif()
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file(GLOB SRC_FILES
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get_row_f32.cpp
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get_row_f16.cpp
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@ -13,7 +9,6 @@ file(GLOB SRC_FILES
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dup.cpp
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)
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string(TOLOWER ${SOC_TYPE} SOC_VERSION)
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set(ASCEND_CANN_PACKAGE_PATH ${CANN_INSTALL_DIR})
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set(RUN_MODE "npu" CACHE STRING "run mode: npu/sim")
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@ -30,4 +25,6 @@ ascendc_library(ascendc_kernels STATIC
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${SRC_FILES}
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)
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message(STATUS "CANN: compile ascend kernels witch SOC_VERSION:${SOC_VERSION}.")
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ascendc_compile_definitions(ascendc_kernels PRIVATE "-D${SOC_TYPE_COMPILE_OPTION}")
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# ascendc_compile_definitions(ascendc_kernels PRIVATE -DASCENDC_DUMP)
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@ -5,6 +5,7 @@
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using namespace AscendC;
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#define BUFFER_NUM 2
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const int64_t SUPPORTED_MAX_DIM = 65535; // currently the limit of max block dim supportted by dup kernel is 65535template <typename SRC_T, typename DST_T>
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template <typename SRC_T, typename DST_T>
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class DupByRows {
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@ -19,6 +20,7 @@ class DupByRows {
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// Input has four dims.
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int64_t op_block_num = GetBlockNum();
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int64_t op_block_idx = GetBlockIdx();
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assert(op_block_idx < SUPPORTED_MAX_DIM && op_block_idx >= 0, "Invalid block index:%d, max is:%d\n", op_block_idx, SUPPORTED_MAX_DIM);
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// param
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num_rows = input_ne_ub[1] * input_ne_ub[2] * input_ne_ub[3];
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@ -51,24 +53,36 @@ class DupByRows {
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__aicore__ inline void copy_in() {
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LocalTensor<SRC_T> src_local = src_queue.AllocTensor<SRC_T>();
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DataCopyExtParams dataCopyParams;
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dataCopyParams.blockCount = 1;
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dataCopyParams.blockLen = num_elem * sizeof(SRC_T);
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DataCopyPadExtParams<SRC_T> padParams;
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DataCopyPad(src_local, src_gm, dataCopyParams, padParams);
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const size_t elem_per_block = 32 / sizeof(SRC_T);
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size_t tail = num_elem % elem_per_block;
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size_t cpy_elements_len = tail > 0 ? num_elem + 1 : num_elem;
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DataCopy(src_local, src_gm, cpy_elements_len);
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src_queue.EnQue(src_local);
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}
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__aicore__ inline void copy_out() {
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LocalTensor<DST_T> dst_local = dst_queue.DeQue<DST_T>();
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#ifdef ASCEND_310P
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const size_t elem_per_block = 32 / sizeof(DST_T);
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size_t tail = num_elem % elem_per_block;
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size_t len = num_elem & ~(elem_per_block - 1);
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if (len > 0) {
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DataCopy(dst_gm, dst_local, len);
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}
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if(tail != 0) {
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for (size_t i = tail; i < elem_per_block; i++) {
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dst_local[len + i].SetValue(0, 0);
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}
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SetAtomicAdd<float>();
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DataCopy(dst_gm[len], dst_local[len], elem_per_block);
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SetAtomicNone();
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}
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#else
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DataCopyExtParams dataCopyParams;
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dataCopyParams.blockCount = 1;
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dataCopyParams.blockLen = num_elem * sizeof(DST_T);
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DataCopyPad(dst_gm, dst_local, dataCopyParams);
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#endif
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dst_queue.FreeTensor(dst_local);
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}
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@ -14,7 +14,7 @@ class GET_ROW_F16 {
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int64_t *output_ne_ub, size_t *output_nb_ub) {
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// TODO, use template for F16/f32
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int64_t op_block_num = GetBlockNum();
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int64_t op_block_idx = GetBlockIdx();
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op_block_idx = GetBlockIdx();
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for (int i = 0; i < 4; i++) {
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input_ne[i] = input_ne_ub[i];
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@ -59,32 +59,42 @@ class GET_ROW_F16 {
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}
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__aicore__ inline void copy_in(uint32_t offset, size_t len) {
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size_t origin_len = len;
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LocalTensor<half> input_local = input_queue.AllocTensor<half>();
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size_t tail = len % 32;
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len = len & ~31;
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DataCopy(input_local, input_gm[offset], len);
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const size_t elem_per_block = 32 / sizeof(half);
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size_t tail = len % elem_per_block;
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len = len & ~(elem_per_block - 1);
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if(tail != 0) {
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DataCopyExtParams dataCopyParams;
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dataCopyParams.blockCount = 1;
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dataCopyParams.blockLen = tail * sizeof(half);
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DataCopyPadExtParams<half> padParams;
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DataCopyPad(input_local[len], input_gm[offset + len],
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dataCopyParams, padParams);
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len += elem_per_block;
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}
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DataCopy(input_local, input_gm[offset], len);
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input_queue.EnQue(input_local);
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}
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__aicore__ inline void copy_out(uint32_t offset, size_t len) {
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LocalTensor<float> output_local = output_queue.DeQue<float>();
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size_t tail = len % 32;
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len = len & ~31;
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DataCopy(output_gm[offset], output_local, len);
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const size_t elem_per_block = 32 / sizeof(float);
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size_t tail = len % elem_per_block;
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len = len & ~(elem_per_block - 1);
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if (len > 0) {
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DataCopy(output_gm[offset], output_local, len);
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}
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if(tail != 0) {
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#ifdef ASCEND_310P
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for (size_t i = tail; i < elem_per_block; i++) {
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output_local[len + i].SetValue(0, 0);
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}
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SetAtomicAdd<float>();
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DataCopy(output_gm[offset + len], output_local[len], elem_per_block);
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SetAtomicNone();
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#else
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DataCopyExtParams dataCopyParams;
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dataCopyParams.blockCount = 1;
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dataCopyParams.blockLen = tail * sizeof(float);
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DataCopyPad(output_gm[offset + len], output_local[len],
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dataCopyParams);
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#endif
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}
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output_queue.FreeTensor(output_local);
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}
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@ -150,6 +160,7 @@ class GET_ROW_F16 {
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GlobalTensor<float> output_gm;
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TQue<QuePosition::VECIN, BUFFER_NUM> input_queue;
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TQue<QuePosition::VECOUT, BUFFER_NUM> output_queue;
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int64_t op_block_idx;
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};
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template <typename T>
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@ -13,7 +13,7 @@ class GET_ROW_F32 {
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int64_t *indices_ne_ub, size_t *indices_nb_ub,
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int64_t *output_ne_ub, size_t *output_nb_ub) {
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int64_t op_block_num = GetBlockNum();
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int64_t op_block_idx = GetBlockIdx();
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op_block_idx = GetBlockIdx();
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for (int i = 0; i < 4; i++) {
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input_ne[i] = input_ne_ub[i];
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@ -55,31 +55,40 @@ class GET_ROW_F32 {
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__aicore__ inline void copy_in(uint32_t offset, size_t len) {
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LocalTensor<float> input_local = input_queue.AllocTensor<float>();
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size_t tail = len % 32;
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len = len & ~31;
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DataCopy(input_local, input_gm[offset], len);
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const size_t elem_per_block = 32 / sizeof(float);
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size_t tail = len % elem_per_block;
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len = len & ~(elem_per_block - 1);
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if(tail != 0) {
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DataCopyExtParams dataCopyParams;
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dataCopyParams.blockCount = 1;
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dataCopyParams.blockLen = tail * sizeof(float);
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DataCopyPadExtParams<float> padParams;
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DataCopyPad(input_local[len], input_gm[offset + len],
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dataCopyParams, padParams);
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len += elem_per_block;
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}
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DataCopy(input_local, input_gm[offset], len);
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input_queue.EnQue(input_local);
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}
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__aicore__ inline void copy_out(uint32_t offset, size_t len) {
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LocalTensor<float> output_local = output_queue.DeQue<float>();
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size_t tail = len % 32;
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len = len & ~31;
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DataCopy(output_gm[offset], output_local, len);
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const size_t elem_per_block = 32 / sizeof(float);
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size_t tail = len % elem_per_block;
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len = len & ~(elem_per_block - 1);
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if (len > 0) {
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DataCopy(output_gm[offset], output_local, len);
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}
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if(tail != 0) {
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#ifdef ASCEND_310P
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for (size_t i = tail; i < elem_per_block; i++) {
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output_local[len + i].SetValue(0, 0);
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}
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SetAtomicAdd<float>();
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DataCopy(output_gm[offset + len], output_local[len], elem_per_block);
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SetAtomicNone();
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#else
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DataCopyExtParams dataCopyParams;
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dataCopyParams.blockCount = 1;
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dataCopyParams.blockLen = tail * sizeof(float);
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DataCopyPad(output_gm[offset + len], output_local[len],
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dataCopyParams);
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#endif
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}
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output_queue.FreeTensor(output_local);
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}
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@ -144,6 +153,7 @@ class GET_ROW_F32 {
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GlobalTensor<float> output_gm;
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TQue<QuePosition::VECIN, BUFFER_NUM> input_queue;
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TQue<QuePosition::VECOUT, BUFFER_NUM> output_queue;
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int64_t op_block_idx;
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};
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template <typename T>
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LocalTensor<float> output_local = output_queue.AllocTensor<float>();
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// TODO: cast more data to speed up.
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#ifdef ASCEND_310P
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// TODO: 310P support quantification
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#else
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Cast(cast_local, input_local, RoundMode::CAST_NONE, QK4_0);
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Cast(output_local, cast_local, RoundMode::CAST_NONE, QK4_0);
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#endif
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// Only mul need compile by group.
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half scale = scale_gm.GetValue(scale_offset);
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