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musa: enable building fat binaries, enable unified memory, and disable Flash Attention on QY1 (MTT S80) (#9526)
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* mtgpu: add mp_21 support Signed-off-by: Xiaodong Ye <xiaodong.ye@mthreads.com> * mtgpu: disable flash attention on qy1 (MTT S80); disable q3_k and mul_mat_batched_cublas Signed-off-by: Xiaodong Ye <xiaodong.ye@mthreads.com> * mtgpu: enable unified memory Signed-off-by: Xiaodong Ye <xiaodong.ye@mthreads.com> * mtgpu: map cublasOperation_t to mublasOperation_t (sync code to latest) Signed-off-by: Xiaodong Ye <xiaodong.ye@mthreads.com> --------- Signed-off-by: Xiaodong Ye <xiaodong.ye@mthreads.com>
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912c331d3d
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c35e586ea5
2
Makefile
2
Makefile
@ -611,7 +611,7 @@ ifdef GGML_CUDA
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MK_CPPFLAGS += -DGGML_USE_CUDA -I$(CUDA_PATH)/include
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MK_LDFLAGS += -lmusa -lmublas -lmusart -lpthread -ldl -lrt -L$(CUDA_PATH)/lib -L/usr/lib64
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MK_NVCCFLAGS += -x musa -mtgpu --cuda-gpu-arch=mp_22
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MK_NVCCFLAGS += -x musa -mtgpu --cuda-gpu-arch=mp_21 --cuda-gpu-arch=mp_22
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else
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ifneq ('', '$(wildcard /opt/cuda)')
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CUDA_PATH ?= /opt/cuda
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@ -364,7 +364,7 @@ if (GGML_CUDA)
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if (GGML_MUSA)
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set_source_files_properties(${GGML_SOURCES_CUDA} PROPERTIES LANGUAGE CXX)
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foreach(SOURCE ${GGML_SOURCES_CUDA})
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set_property(SOURCE ${SOURCE} PROPERTY COMPILE_FLAGS "-x musa -mtgpu --cuda-gpu-arch=mp_22")
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set_property(SOURCE ${SOURCE} PROPERTY COMPILE_FLAGS "-x musa -mtgpu --cuda-gpu-arch=mp_21 --cuda-gpu-arch=mp_22")
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endforeach()
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endif()
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@ -136,7 +136,7 @@ static cudaError_t ggml_cuda_device_malloc(void ** ptr, size_t size, int device)
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return res;
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#else
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#if !defined(GGML_USE_HIPBLAS) && !defined(GGML_USE_MUSA)
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#if !defined(GGML_USE_HIPBLAS)
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cudaError_t err;
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if (getenv("GGML_CUDA_ENABLE_UNIFIED_MEMORY") != nullptr)
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{
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@ -149,7 +149,7 @@ static cudaError_t ggml_cuda_device_malloc(void ** ptr, size_t size, int device)
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return err;
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#else
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return cudaMalloc(ptr, size);
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#endif // !defined(GGML_USE_HIPBLAS) && !defined(GGML_USE_MUSA)
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#endif // !defined(GGML_USE_HIPBLAS)
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#endif
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}
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@ -2830,6 +2830,12 @@ GGML_CALL static bool ggml_backend_cuda_supports_op(ggml_backend_t backend, cons
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if (op->op == GGML_OP_MUL_MAT && a->ne[3] != b->ne[3]) {
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return false;
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}
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#ifdef GGML_USE_MUSA
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if (b->type == GGML_TYPE_F16 && b->ne[2]*b->ne[3] > 1 &&
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!ggml_is_transposed(a) && !ggml_is_transposed(b)) {
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return false;
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}
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#endif // GGML_USE_MUSA
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switch (a->type) {
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case GGML_TYPE_F32:
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case GGML_TYPE_F16:
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@ -2853,6 +2859,11 @@ GGML_CALL static bool ggml_backend_cuda_supports_op(ggml_backend_t backend, cons
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case GGML_TYPE_IQ3_XXS:
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case GGML_TYPE_IQ4_NL:
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case GGML_TYPE_IQ4_XS:
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#ifdef GGML_USE_MUSA
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if (a->type == GGML_TYPE_Q3_K) {
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return false;
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}
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#endif // GGML_USE_MUSA
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return true;
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default:
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return false;
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@ -2978,6 +2989,9 @@ GGML_CALL static bool ggml_backend_cuda_supports_op(ggml_backend_t backend, cons
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case GGML_OP_RWKV_WKV:
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return true;
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case GGML_OP_FLASH_ATTN_EXT: {
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#ifndef FLASH_ATTN_AVAILABLE
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return false;
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#endif
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if (op->src[0]->ne[0] == 64 && op->src[1]->type == GGML_TYPE_F16) {
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return true;
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}
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@ -50,6 +50,8 @@
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#define CC_RDNA1 (CC_OFFSET_AMD + 1010)
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#define CC_RDNA2 (CC_OFFSET_AMD + 1030)
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#define CC_RDNA3 (CC_OFFSET_AMD + 1100)
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#define CC_QY1 210
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#define CC_QY2 220
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#define MATRIX_ROW_PADDING 512 // last row of quant. matrices is a multiple of this to avoid out-of-bounds memory accesses
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@ -134,6 +136,10 @@ typedef float2 dfloat2;
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#define INT8_MMA_AVAILABLE
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#endif // !(defined(GGML_USE_HIPBLAS) && defined(__HIP_PLATFORM_AMD__)) && __CUDA_ARCH__ >= CC_TURING
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#if !(defined(GGML_USE_MUSA) && __MUSA_ARCH__ <= CC_QY1)
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#define FLASH_ATTN_AVAILABLE
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#endif // !(defined(GGML_USE_MUSA) && __MUSA_ARCH__ <= CC_QY1)
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static constexpr bool fast_fp16_available(const int cc) {
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return cc >= CC_PASCAL && cc != 610;
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}
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@ -44,13 +44,17 @@ static __global__ void flash_attn_tile_ext_f32(
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const int ne1,
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const int ne2,
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const int ne3) {
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#ifndef FLASH_ATTN_AVAILABLE
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NO_DEVICE_CODE;
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return;
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#endif // FLASH_ATTN_AVAILABLE
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// Skip unused kernel variants for faster compilation:
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if (use_logit_softcap && !(D == 128 || D == 256)) {
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NO_DEVICE_CODE;
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return;
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}
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//In this kernel Q, K, V are matrices while i, j, k are matrix indices.
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// In this kernel Q, K, V are matrices while i, j, k are matrix indices.
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const int ic0 = (blockIdx.x / parallel_blocks) * ncols; // Index of the Q/QKV column to work on.
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const int ip = blockIdx.x % parallel_blocks; // Index in group of blocks running for the same column in parallel.
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2
ggml/src/ggml-cuda/vendors/musa.h
vendored
2
ggml/src/ggml-cuda/vendors/musa.h
vendored
@ -26,6 +26,7 @@
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#define cublasSetStream mublasSetStream
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#define cublasSgemm mublasSgemm
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#define cublasStatus_t mublasStatus_t
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#define cublasOperation_t mublasOperation_t
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#define cublasGetStatusString mublasStatus_to_string
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#define cudaDataType_t musaDataType_t
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#define cudaDeviceCanAccessPeer musaDeviceCanAccessPeer
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@ -56,6 +57,7 @@
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#define cudaLaunchHostFunc musaLaunchHostFunc
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#define cudaMalloc musaMalloc
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#define cudaMallocHost musaMallocHost
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#define cudaMallocManaged musaMallocManaged
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#define cudaMemcpy musaMemcpy
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#define cudaMemcpyAsync musaMemcpyAsync
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#define cudaMemcpyPeerAsync musaMemcpyPeerAsync
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