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@ -317,8 +317,6 @@ static bool ggml_backend_amx_device_supports_op(ggml_backend_dev_t dev, const st
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const enum ggml_type type = src0->type;
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const enum ggml_type type = src0->type;
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const int64_t ne0 = op->ne[0];
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const int64_t ne0 = op->ne[0];
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bool is_training = src0->grad || src1->grad;
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// amx kernels enables for Q4_0, Q4_1, Q8_0, F16
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// amx kernels enables for Q4_0, Q4_1, Q8_0, F16
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// Q4_K, Q5_K, Q6_K, IQ4_XS enabled for QK_K = 256
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// Q4_K, Q5_K, Q6_K, IQ4_XS enabled for QK_K = 256
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bool has_amx_kernels = qtype_has_amx_kernels(type) || (type == GGML_TYPE_F16);
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bool has_amx_kernels = qtype_has_amx_kernels(type) || (type == GGML_TYPE_F16);
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@ -326,7 +324,6 @@ static bool ggml_backend_amx_device_supports_op(ggml_backend_dev_t dev, const st
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bool can_use_amx =
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bool can_use_amx =
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is_contiguous_2d(src0) && // src0 must be contiguous
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is_contiguous_2d(src0) && // src0 must be contiguous
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is_contiguous_2d(src1) && // src1 must be contiguous
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is_contiguous_2d(src1) && // src1 must be contiguous
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!is_training && // inference only
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src1->type == GGML_TYPE_F32 && // src1 must be float32
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src1->type == GGML_TYPE_F32 && // src1 must be float32
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has_amx_kernels && // with amx kernel impls
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has_amx_kernels && // with amx kernel impls
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ne0 % (TILE_N * 2) == 0; // out_features is 32x
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ne0 % (TILE_N * 2) == 0; // out_features is 32x
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