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https://github.com/ggerganov/llama.cpp.git
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parent
20d7740a9b
commit
f7d278faf3
35
ggml-cuda.cu
35
ggml-cuda.cu
@ -239,13 +239,13 @@ struct ggml_tensor_extra_gpu {
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cudaEvent_t events[GGML_CUDA_MAX_DEVICES]; // events for synchronizing multiple GPUs
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};
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static __global__ void add_f32(const float * x, const float * y, float * dst, const int kx, const int ky) {
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static __global__ void add_f32(const float * x, const float * y, float * dst, const int k) {
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const int i = blockDim.x*blockIdx.x + threadIdx.x;
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if (i >= kx) {
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if (i >= k) {
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return;
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}
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dst[i] = x[i] + y[i%ky];
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dst[i] = x[i] + y[i];
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}
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static __global__ void add_f16_f32_f16(const half * x, const float * y, half * dst, const int k) {
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@ -1718,9 +1718,9 @@ static __global__ void scale_f32(const float * x, float * dst, const float scale
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dst[i] = scale * x[i];
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}
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static void add_f32_cuda(const float * x, const float * y, float * dst, const int kx, const int ky, cudaStream_t stream) {
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const int num_blocks = (kx + CUDA_ADD_BLOCK_SIZE - 1) / CUDA_ADD_BLOCK_SIZE;
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add_f32<<<num_blocks, CUDA_ADD_BLOCK_SIZE, 0, stream>>>(x, y, dst, kx, ky);
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static void add_f32_cuda(const float * x, const float * y, float * dst, const int k, cudaStream_t stream) {
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const int num_blocks = (k + CUDA_ADD_BLOCK_SIZE - 1) / CUDA_ADD_BLOCK_SIZE;
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add_f32<<<num_blocks, CUDA_ADD_BLOCK_SIZE, 0, stream>>>(x, y, dst, k);
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}
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static void add_f16_f32_f16_cuda(const half * x, const float * y, half * dst, const int k, cudaStream_t stream) {
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@ -2272,7 +2272,10 @@ inline void ggml_cuda_op_add(
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GGML_ASSERT(src0_ddq_i != nullptr || src0_ddf_i != nullptr);
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GGML_ASSERT(src1_ddf_i != nullptr);
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GGML_ASSERT(dst_ddf_i != nullptr);
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GGML_ASSERT(dst_ddf_i != nullptr);
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// TODO: support broadcasting
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GGML_ASSERT(ggml_nelements(src0) == ggml_nelements(src1));
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const int64_t ne00 = src0->ne[0];
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const int64_t i01_diff = i01_high - i01_low;
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@ -2281,7 +2284,7 @@ inline void ggml_cuda_op_add(
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// compute
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if (src0->type == GGML_TYPE_F32 && dst->type == GGML_TYPE_F32) {
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add_f32_cuda(src0_ddf_i, src1_ddf_i, dst_ddf_i, ne00*i01_diff, ne10, cudaStream_main);
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add_f32_cuda(src0_ddf_i, src1_ddf_i, dst_ddf_i, ne00*i01_diff, cudaStream_main);
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} else if (src0->type == GGML_TYPE_F16 && dst->type == GGML_TYPE_F16) {
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add_f16_f32_f16_cuda((half *) src0_ddq_i, src1_ddf_i, (half *) dst_ddf_i, ne00*i01_diff, cudaStream_main);
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} else {
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@ -2302,14 +2305,22 @@ inline void ggml_cuda_op_mul(
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GGML_ASSERT(src0_ddf_i != nullptr);
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GGML_ASSERT(src1_ddf_i != nullptr);
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GGML_ASSERT(dst_ddf_i != nullptr);
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GGML_ASSERT(dst_ddf_i != nullptr);
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const int64_t ne00 = src0->ne[0];
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const int64_t i01_diff = i01_high - i01_low;
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const int64_t ne10 = src1->ne[0];
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const int64_t ne11 = src1->ne[1];
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mul_f32_cuda(src0_ddf_i, src1_ddf_i, dst_ddf_i, ne00*i01_diff, ne10, cudaStream_main);
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for (int64_t i01 = i01_low; i01 < i01_high; i01++) {
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const int64_t i11 = i1*ne11 + i01%ne11; // broadcast src1 across src0
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float * src0_ddf_i01 = src0_ddf_i + i01*ne00;
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float * src1_ddf_i01 = src1_ddf_i + i11*ne10;
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float * dst_ddf_i01 = dst_ddf_i + i01*ne00;
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// compute
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mul_f32_cuda(src0_ddf_i01, src1_ddf_i01, dst_ddf_i01, ne00, ne10, cudaStream_main);
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}
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(void) dst;
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(void) src0_ddq_i;
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