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https://github.com/ggerganov/llama.cpp.git
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metal : fattn quantization (wip)
This commit is contained in:
Georgi Gerganov
parent
1926d6e39d
commit
fdc2bb17b6
@ -258,6 +258,7 @@ enum ggml_metal_kernel_type {
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//GGML_METAL_KERNEL_TYPE_FLASH_ATTN_EXT_F16_H256, // https://github.com/ggerganov/llama.cpp/issues/7261
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//GGML_METAL_KERNEL_TYPE_FLASH_ATTN_EXT_F16_H256, // https://github.com/ggerganov/llama.cpp/issues/7261
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GGML_METAL_KERNEL_TYPE_FLASH_ATTN_EXT_VEC_F16_H128,
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GGML_METAL_KERNEL_TYPE_FLASH_ATTN_EXT_VEC_F16_H128,
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//GGML_METAL_KERNEL_TYPE_FLASH_ATTN_EXT_VEC_F16_H256, // https://github.com/ggerganov/llama.cpp/issues/7261
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//GGML_METAL_KERNEL_TYPE_FLASH_ATTN_EXT_VEC_F16_H256, // https://github.com/ggerganov/llama.cpp/issues/7261
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GGML_METAL_KERNEL_TYPE_FLASH_ATTN_EXT_Q8_0_H128,
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GGML_METAL_KERNEL_TYPE_CPY_F32_F32,
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GGML_METAL_KERNEL_TYPE_CPY_F32_F32,
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GGML_METAL_KERNEL_TYPE_CPY_F32_F16,
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GGML_METAL_KERNEL_TYPE_CPY_F32_F16,
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GGML_METAL_KERNEL_TYPE_CPY_F16_F16,
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GGML_METAL_KERNEL_TYPE_CPY_F16_F16,
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@ -706,6 +707,7 @@ static struct ggml_backend_metal_context * ggml_metal_init(ggml_backend_dev_t de
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//GGML_METAL_ADD_KERNEL(GGML_METAL_KERNEL_TYPE_FLASH_ATTN_EXT_F16_H256, flash_attn_ext_f16_h256, support_simdgroup_mm);
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//GGML_METAL_ADD_KERNEL(GGML_METAL_KERNEL_TYPE_FLASH_ATTN_EXT_F16_H256, flash_attn_ext_f16_h256, support_simdgroup_mm);
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GGML_METAL_ADD_KERNEL(GGML_METAL_KERNEL_TYPE_FLASH_ATTN_EXT_VEC_F16_H128, flash_attn_ext_vec_f16_h128, support_simdgroup_reduction);
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GGML_METAL_ADD_KERNEL(GGML_METAL_KERNEL_TYPE_FLASH_ATTN_EXT_VEC_F16_H128, flash_attn_ext_vec_f16_h128, support_simdgroup_reduction);
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//GGML_METAL_ADD_KERNEL(GGML_METAL_KERNEL_TYPE_FLASH_ATTN_EXT_VEC_F16_H256, flash_attn_ext_vec_f16_h256, support_simdgroup_reduction);
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//GGML_METAL_ADD_KERNEL(GGML_METAL_KERNEL_TYPE_FLASH_ATTN_EXT_VEC_F16_H256, flash_attn_ext_vec_f16_h256, support_simdgroup_reduction);
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GGML_METAL_ADD_KERNEL(GGML_METAL_KERNEL_TYPE_FLASH_ATTN_EXT_Q8_0_H128, flash_attn_ext_q8_0_h128, support_simdgroup_reduction);
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GGML_METAL_ADD_KERNEL(GGML_METAL_KERNEL_TYPE_CPY_F32_F16, cpy_f32_f16, true);
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GGML_METAL_ADD_KERNEL(GGML_METAL_KERNEL_TYPE_CPY_F32_F16, cpy_f32_f16, true);
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GGML_METAL_ADD_KERNEL(GGML_METAL_KERNEL_TYPE_CPY_F32_F32, cpy_f32_f32, true);
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GGML_METAL_ADD_KERNEL(GGML_METAL_KERNEL_TYPE_CPY_F32_F32, cpy_f32_f32, true);
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GGML_METAL_ADD_KERNEL(GGML_METAL_KERNEL_TYPE_CPY_F16_F16, cpy_f16_f16, true);
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GGML_METAL_ADD_KERNEL(GGML_METAL_KERNEL_TYPE_CPY_F16_F16, cpy_f16_f16, true);
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@ -862,12 +864,6 @@ static bool ggml_metal_supports_op(const struct ggml_backend_metal_device_contex
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case GGML_OP_LEAKY_RELU:
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case GGML_OP_LEAKY_RELU:
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return true;
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return true;
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case GGML_OP_FLASH_ATTN_EXT:
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case GGML_OP_FLASH_ATTN_EXT:
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if (op->src[1]->type != GGML_TYPE_F16) {
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return false;
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}
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if (op->src[2]->type != GGML_TYPE_F16) {
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return false;
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}
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if (op->src[0]->ne[0] == 256) {
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if (op->src[0]->ne[0] == 256) {
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return false;
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return false;
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}
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}
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@ -2861,7 +2857,11 @@ static void ggml_metal_encode_node(
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bool use_vec_kernel = false;
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bool use_vec_kernel = false;
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if (ne01 >= 4 || (ne00%128 != 0)) {
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if (src1->type == GGML_TYPE_Q8_0 && src2->type == GGML_TYPE_Q8_0) {
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use_vec_kernel = true;
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pipeline = ctx->kernels[GGML_METAL_KERNEL_TYPE_FLASH_ATTN_EXT_Q8_0_H128].pipeline;
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} else if (ne01 >= 4 || (ne00%128 != 0)) {
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switch (ne00) {
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switch (ne00) {
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case 64: pipeline = ctx->kernels[GGML_METAL_KERNEL_TYPE_FLASH_ATTN_EXT_F16_H64 ].pipeline; break;
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case 64: pipeline = ctx->kernels[GGML_METAL_KERNEL_TYPE_FLASH_ATTN_EXT_F16_H64 ].pipeline; break;
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case 80: pipeline = ctx->kernels[GGML_METAL_KERNEL_TYPE_FLASH_ATTN_EXT_F16_H80 ].pipeline; break;
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case 80: pipeline = ctx->kernels[GGML_METAL_KERNEL_TYPE_FLASH_ATTN_EXT_F16_H80 ].pipeline; break;
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@ -2293,7 +2293,7 @@ kernel void kernel_leaky_relu_f32(
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dst[tpig] = src0[tpig] > 0.0f ? src0[tpig] : src0[tpig] * slope;
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dst[tpig] = src0[tpig] > 0.0f ? src0[tpig] : src0[tpig] * slope;
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}
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}
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typedef void (flash_attn_ext_f16_t)(
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typedef void (flash_attn_ext_t)(
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device const char * q,
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device const char * q,
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device const char * k,
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device const char * k,
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device const char * v,
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device const char * v,
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@ -2652,12 +2652,12 @@ kernel void kernel_flash_attn_ext_f16(
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}
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}
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}
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}
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template [[host_name("kernel_flash_attn_ext_f16_h64" )]] kernel flash_attn_ext_f16_t kernel_flash_attn_ext_f16<64>;
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template [[host_name("kernel_flash_attn_ext_f16_h64" )]] kernel flash_attn_ext_t kernel_flash_attn_ext_f16<64>;
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template [[host_name("kernel_flash_attn_ext_f16_h80" )]] kernel flash_attn_ext_f16_t kernel_flash_attn_ext_f16<80>;
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template [[host_name("kernel_flash_attn_ext_f16_h80" )]] kernel flash_attn_ext_t kernel_flash_attn_ext_f16<80>;
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template [[host_name("kernel_flash_attn_ext_f16_h96" )]] kernel flash_attn_ext_f16_t kernel_flash_attn_ext_f16<96>;
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template [[host_name("kernel_flash_attn_ext_f16_h96" )]] kernel flash_attn_ext_t kernel_flash_attn_ext_f16<96>;
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template [[host_name("kernel_flash_attn_ext_f16_h112")]] kernel flash_attn_ext_f16_t kernel_flash_attn_ext_f16<112>;
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template [[host_name("kernel_flash_attn_ext_f16_h112")]] kernel flash_attn_ext_t kernel_flash_attn_ext_f16<112>;
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template [[host_name("kernel_flash_attn_ext_f16_h128")]] kernel flash_attn_ext_f16_t kernel_flash_attn_ext_f16<128>;
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template [[host_name("kernel_flash_attn_ext_f16_h128")]] kernel flash_attn_ext_t kernel_flash_attn_ext_f16<128>;
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//template [[host_name("kernel_flash_attn_ext_f16_h256")]] kernel flash_attn_ext_f16_t kernel_flash_attn_ext_f16<256>;
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//template [[host_name("kernel_flash_attn_ext_f16_h256")]] kernel flash_attn_ext_t kernel_flash_attn_ext_f16<256>;
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template<int64_t D, int64_t Q = 1, int64_t C = 32> // head size, queries per threadgroup, cache items per threadgroup
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template<int64_t D, int64_t Q = 1, int64_t C = 32> // head size, queries per threadgroup, cache items per threadgroup
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kernel void kernel_flash_attn_ext_vec_f16(
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kernel void kernel_flash_attn_ext_vec_f16(
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@ -2941,8 +2941,334 @@ kernel void kernel_flash_attn_ext_vec_f16(
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}
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}
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}
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}
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template [[host_name("kernel_flash_attn_ext_vec_f16_h128")]] kernel flash_attn_ext_f16_t kernel_flash_attn_ext_vec_f16<128>;
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template [[host_name("kernel_flash_attn_ext_vec_f16_h128")]] kernel flash_attn_ext_t kernel_flash_attn_ext_vec_f16<128>;
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//template [[host_name("kernel_flash_attn_ext_vec_f16_h256")]] kernel flash_attn_ext_f16_t kernel_flash_attn_ext_vec_f16<256>;
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//template [[host_name("kernel_flash_attn_ext_vec_f16_h256")]] kernel flash_attn_ext_t kernel_flash_attn_ext_vec_f16<256>;
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template <typename type4x4>
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void dequantize_q8_0(device const block_q8_0 *xb, short il, thread type4x4 & reg);
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template<int64_t D, int64_t Q = 1, int64_t C = 32> // head size, queries per threadgroup, cache items per threadgroup
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kernel void kernel_flash_attn_ext_q8_0(
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device const char * q,
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device const char * k,
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device const char * v,
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device const char * mask,
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device float * dst,
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constant int64_t & ne01,
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constant int64_t & ne02,
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constant int64_t & ne03,
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constant uint64_t & nb01,
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constant uint64_t & nb02,
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constant uint64_t & nb03,
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constant int64_t & ne11,
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constant int64_t & ne12,
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constant int64_t & ne13,
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constant uint64_t & nb11,
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constant uint64_t & nb12,
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constant uint64_t & nb13,
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constant uint64_t & nb21,
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constant uint64_t & nb22,
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constant uint64_t & nb23,
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constant uint64_t & nb31,
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constant int64_t & ne1,
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constant int64_t & ne2,
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constant float & scale,
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constant float & max_bias,
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constant float & m0,
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constant float & m1,
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constant uint32_t & n_head_log2,
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constant float & logit_softcap,
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threadgroup half * shared [[threadgroup(0)]],
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uint3 tgpig[[threadgroup_position_in_grid]],
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uint3 tpitg[[thread_position_in_threadgroup]],
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uint3 ntg[[threads_per_threadgroup]],
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ushort tiisg[[thread_index_in_simdgroup]],
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ushort sgitg[[simdgroup_index_in_threadgroup]]) {
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const short nsg = ntg.y; // number of simdgroups
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const short iq3 = tgpig[2];
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const short iq2 = tgpig[1];
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const short iq1 = tgpig[0];
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const short D4 = D/4;
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const short NW = N_SIMDWIDTH;
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const short SH = (C + Q); // shared memory per simdgroup in (half)
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const short T = D + 2*nsg*SH; // shared memory size per query in (half)
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float slope = 1.0f;
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// ALiBi
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if (max_bias > 0.0f) {
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const uint32_t h = iq2;
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const float base = h < n_head_log2 ? m0 : m1;
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const int exp = h < n_head_log2 ? h + 1 : 2*(h - n_head_log2) + 1;
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slope = pow(base, exp);
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}
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//threadgroup half * sq = (threadgroup half *) (shared + 0*D); // holds the query data
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threadgroup half4 * sq4 = (threadgroup half4 *) (shared + 0*D); // same as above but in half4
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threadgroup float * ss = (threadgroup float *) (shared + 2*sgitg*SH + 1*D); // scratch buffer for attention and diagonal matrix
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threadgroup float4 * ss4 = (threadgroup float4 *) (shared + 2*sgitg*SH + 1*D); // same as above but in half4
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threadgroup half4 * sr4 = (threadgroup half4 *) (shared + sgitg*D + 1*T); // scratch buffer for the results
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// store the result for all queries in local memory in 8x8 matrices (the O matrix from the paper)
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half4 lo[D4/NW];
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// load heads from Q to shared memory
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device const float4 * q4 = (device const float4 *) ((device const char *) q + (iq1*nb01 + iq2*nb02 + iq3*nb03));
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for (short i = tiisg; i < D4; i += NW) {
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if (iq1 < ne01) {
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sq4[i] = (half4) q4[i];
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} else {
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sq4[i] = 0.0h;
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}
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}
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// zero out lo
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for (short i = tiisg; i < D4; i += NW) {
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lo[i/NW] = 0.0h;
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}
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// zero out shared memory SH
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for (short i = tiisg; i < SH/4; i += NW) {
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ss4[i] = 0.0h;
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}
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threadgroup_barrier(mem_flags::mem_threadgroup);
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{
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float S = { 0.0h };
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float M = { -FLT_MAX/2 };
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// assume K and V are same shape
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const short ne22 = ne12;
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const short ne23 = ne13;
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// broadcast
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const short rk2 = ne02/ne12;
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const short rk3 = ne03/ne13;
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const short rv2 = ne02/ne22;
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const short rv3 = ne03/ne23;
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// k indices
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const short ik2 = iq2 / rk2;
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const short ik3 = iq3 / rk3;
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// v indices
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const short iv2 = iq2 / rv2;
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const short iv3 = iq3 / rv3;
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// load the queries from shared memory into local memory
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float4 mq[D4];
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for (short ii = 0; ii < D4; ii += NW) {
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short i = ii + tiisg;
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mq[i] = (float4) sq4[i];
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}
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// pointer to the mask
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device const half4 * mp4 = (device const half4 *) (mask + iq1*nb31);
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// loop over the KV cache
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// each simdgroup handles blocks of Q rows and C columns
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for (int ic0 = 0; ic0 < ne11; ic0 += C*nsg) {
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const int ic = ic0 + C*sgitg;
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if (ic >= ne11) {
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break;
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}
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// Q*K^T
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{
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#pragma unroll
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for (short cc = 0; cc < C/4; ++cc) {
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float4 mqk = { 0.0h };
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//device const half4 * pk4 = (device const half4 *) ((device const char *) k + ((ic + 4*cc)*nb11 + ik2*nb12 + ik3*nb13));
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//device const block_q8_0 * pk = (device const block_q8_0 *) ((device const char *) k + ((ic + 4*cc)*nb11 + ik2*nb12 + ik3*nb13));
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#pragma unroll
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//for (short ii = 0; ii < D4; ii += NW) {
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// const short i = ii + tiisg;
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// float4x4 mk;
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// mk[0] = (float4) pk4[i + 0*(nb11/8)];
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// mk[1] = (float4) pk4[i + 1*(nb11/8)];
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// mk[2] = (float4) pk4[i + 2*(nb11/8)];
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// mk[3] = (float4) pk4[i + 3*(nb11/8)];
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// mqk += (float4) (mq[i] * mk);
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//}
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//for (short ii = 0; ii < D/16; ii += NW) {
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// const short i = ii + tiisg%8;
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// const short j = tiisg/8;
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// device const block_q8_0 * pk = (device const block_q8_0 *) ((device const char *) k + ((ic + 4*cc + j)*nb11 + ik2*nb12 + ik3*nb13));
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// float4x4 mk;
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// dequantize_q8_0<float4x4>(pk + i/2, i%2, mk);
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// //mqk += mq[4*i + 0]*mk[0] + mq[4*i + 1]*mk[1] + mq[4*i + 2]*mk[2] + mq[4*i + 3]*mk[3];
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// mqk[j] += dot(mq[4*i + 0], mk[0]) + dot(mq[4*i + 1], mk[1]) + dot(mq[4*i + 2], mk[2]) + dot(mq[4*i + 3], mk[3]);
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//}
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for (short ii = 0; ii < D4; ii += NW) {
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const short i = ii + tiisg;
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for (short j = 0; j < 4; ++j) {
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device const block_q8_0 * pk = (device const block_q8_0 *) ((device const char *) k + ((ic + 4*cc + j)*nb11 + ik2*nb12 + ik3*nb13));
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float4x4 mk;
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dequantize_q8_0<float4x4>(pk + i/8, (i/4)%2, mk);
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mqk[j] += dot(mq[i], mk[i%4]);
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}
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}
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// reduce the results from the threads in the simdgroup
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mqk += simd_shuffle_down(mqk, 16);
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mqk += simd_shuffle_down(mqk, 8);
|
||||||
|
mqk += simd_shuffle_down(mqk, 4);
|
||||||
|
mqk += simd_shuffle_down(mqk, 2);
|
||||||
|
mqk += simd_shuffle_down(mqk, 1);
|
||||||
|
|
||||||
|
// mqk = mqk*scale + mask*slope
|
||||||
|
if (tiisg == 0) {
|
||||||
|
mqk *= scale;
|
||||||
|
|
||||||
|
if (logit_softcap != 0.0f) {
|
||||||
|
mqk = logit_softcap*precise::tanh(mqk);
|
||||||
|
}
|
||||||
|
|
||||||
|
mqk += (mask != q) ? ((float4) mp4[ic/4 + cc])*slope : (float4) 0.0f;
|
||||||
|
|
||||||
|
ss4[cc] = mqk;
|
||||||
|
}
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
// online softmax
|
||||||
|
{
|
||||||
|
const short p = tiisg;
|
||||||
|
|
||||||
|
const float m = M;
|
||||||
|
const float s = ss[p];
|
||||||
|
|
||||||
|
M = simd_max(max(M, s));
|
||||||
|
|
||||||
|
const float ms = exp(m - M);
|
||||||
|
const float vs = exp(s - M);
|
||||||
|
|
||||||
|
S = S*ms + simd_sum(vs);
|
||||||
|
|
||||||
|
// the P matrix from the paper (Q rows, C columns)
|
||||||
|
ss[p] = vs;
|
||||||
|
|
||||||
|
// O = diag(ms)*O
|
||||||
|
#pragma unroll
|
||||||
|
for (short ii = 0; ii < D4; ii += NW) {
|
||||||
|
const short i = ii + tiisg;
|
||||||
|
lo[i/NW] *= ms;
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
// O = O + (Q*K^T)*V
|
||||||
|
{
|
||||||
|
#pragma unroll
|
||||||
|
for (short cc = 0; cc < C/4; ++cc) {
|
||||||
|
//device const half4 * pv4 = (device const half4 *) ((device const char *) v + ((ic + 4*cc)*nb21 + iv2*nb22 + iv3*nb23));
|
||||||
|
|
||||||
|
#pragma unroll
|
||||||
|
//for (short ii = 0; ii < D4; ii += NW) {
|
||||||
|
// const short i = ii + tiisg;
|
||||||
|
|
||||||
|
// lo[i/NW] += pv4[i + 0*(nb21/8)] * ss[4*cc + 0];
|
||||||
|
// lo[i/NW] += pv4[i + 1*(nb21/8)] * ss[4*cc + 1];
|
||||||
|
// lo[i/NW] += pv4[i + 2*(nb21/8)] * ss[4*cc + 2];
|
||||||
|
// lo[i/NW] += pv4[i + 3*(nb21/8)] * ss[4*cc + 3];
|
||||||
|
//}
|
||||||
|
|
||||||
|
for (short ii = 0; ii < D4; ii += NW) {
|
||||||
|
const short i = ii + tiisg; // 0..31
|
||||||
|
|
||||||
|
for (short j = 0; j < 4; ++j) {
|
||||||
|
device const block_q8_0 * pv = (device const block_q8_0 *) ((device const char *) v + ((ic + 4*cc + j)*nb21 + iv2*nb22 + iv3*nb23));
|
||||||
|
|
||||||
|
half4x4 mv;
|
||||||
|
dequantize_q8_0<half4x4>(pv + i/8, (i/4)%2, mv);
|
||||||
|
|
||||||
|
lo[i/NW] += mv[i%4] * ss[4*cc + j];
|
||||||
|
}
|
||||||
|
}
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
}
|
||||||
|
|
||||||
|
// these are needed for reducing the results from the simdgroups (reuse the ss buffer)
|
||||||
|
if (tiisg == 0) {
|
||||||
|
ss[0] = S;
|
||||||
|
ss[1] = M;
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
// store results to shared memory
|
||||||
|
for (short ii = 0; ii < D4; ii += NW) {
|
||||||
|
short i = ii + tiisg;
|
||||||
|
sr4[i] = lo[ii/NW];
|
||||||
|
}
|
||||||
|
|
||||||
|
threadgroup_barrier(mem_flags::mem_threadgroup);
|
||||||
|
|
||||||
|
// parallel reduce
|
||||||
|
for (short r = nsg/2; r > 0; r >>= 1) {
|
||||||
|
if (sgitg < r) {
|
||||||
|
const float S0 = ss[ 0];
|
||||||
|
const float S1 = ss[r*SH + 0];
|
||||||
|
|
||||||
|
const float M0 = ss[ 1];
|
||||||
|
const float M1 = ss[r*SH + 1];
|
||||||
|
|
||||||
|
const float M = max(M0, M1);
|
||||||
|
|
||||||
|
const float ms0 = exp(M0 - M);
|
||||||
|
const float ms1 = exp(M1 - M);
|
||||||
|
|
||||||
|
const float S = S0*ms0 + S1*ms1;
|
||||||
|
|
||||||
|
if (tiisg == 0) {
|
||||||
|
ss[0] = S;
|
||||||
|
ss[1] = M;
|
||||||
|
}
|
||||||
|
|
||||||
|
// O_0 = diag(ms0)*O_0 + diag(ms1)*O_1
|
||||||
|
for (short ii = 0; ii < D4; ii += NW) {
|
||||||
|
short i = ii + tiisg;
|
||||||
|
sr4[i] = sr4[i]*ms0 + sr4[i + r*D4]*ms1;
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
threadgroup_barrier(mem_flags::mem_threadgroup);
|
||||||
|
}
|
||||||
|
|
||||||
|
device float4 * dst4 = (device float4 *) dst;
|
||||||
|
|
||||||
|
// final rescale with 1/S and store to global memory
|
||||||
|
if (sgitg == 0) {
|
||||||
|
const float S = ss[0];
|
||||||
|
|
||||||
|
for (short ii = 0; ii < D4; ii += NW) {
|
||||||
|
short i = ii + tiisg;
|
||||||
|
dst4[(iq3*ne2*ne1 + iq2 + (iq1)*ne1)*D4 + i] = (float4) sr4[i]/S;
|
||||||
|
}
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
template [[host_name("kernel_flash_attn_ext_q8_0_h128")]] kernel flash_attn_ext_t kernel_flash_attn_ext_q8_0<128>;
|
||||||
|
|
||||||
template<typename T0, typename T1>
|
template<typename T0, typename T1>
|
||||||
kernel void kernel_cpy(
|
kernel void kernel_cpy(
|
||||||
|
|||||||
Loading…
Reference in New Issue
Block a user