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e006d377dd
AMD radeon cards with lower workgroup count limit Partially fixes #1581
31 lines
888 B
Plaintext
31 lines
888 B
Plaintext
/**
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* Copyright (c) 2023 Nomic, Inc. All rights reserved.
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*
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* This software is licensed under the terms of the Software for Open Models License (SOM),
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* version 1.0, as detailed in the LICENSE_SOM.txt file. A copy of this license should accompany
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* this software. Except as expressly granted in the SOM license, all rights are reserved by Nomic, Inc.
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*/
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#version 450
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#include "common.comp"
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layout(local_size_x = 1) in;
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layout(binding = 0) buffer restrict readonly tensorIn { float in_[]; };
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layout(binding = 1) buffer restrict writeonly tensorOut { float out_[]; };
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layout(push_constant) uniform PushConstants {
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uint inOff;
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uint outOff;
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float scale;
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} pcs;
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void main() {
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const uint baseIndex = gl_WorkGroupID.x * 8;
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for (uint x = 0; x < 8; x++) {
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const uint i = baseIndex + x;
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out_[i + pcs.outOff] = in_[i + pcs.inOff] * pcs.scale;
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}
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} |