mirror of
https://github.com/ggerganov/llama.cpp.git
synced 2024-11-11 21:39:52 +00:00
9c67c2773d
* ggml : add ggml_flash_attn_ext API * ggml : fix GQA support in ggml_flash_attn_ext * ggml : online attention (CPU) * metal : initial implementation * metal : f16 precision * metal : reduce branches * metal : specialize for head size * wip : 8 rows per simd group * wip : 4 rows per simd group * wip : template for rows per warp * metal : parallelize across KV size * metal : parallel reduce across heads * metal : efficient flash_attn_f16 implementation * metal : avoid redundant loads of the attention * metal : scale and mask in matrix form * metal : fix comment * llama : avoid ggml_cast, use F32 query * metal : add parallel reduce version (disabled) * metal : move output into local memory + optimize - the result from each simdgroup now stays in the registers - significantly reduced SRAM usage - more efficient skipping of -INF blocks - avoid simdgroup barrier in hot loop - add comments * metal : add tests, fix scaling, support C > 32 * metal : improve precision * ggml : fix f16 mad * metal : minor * metal : support Q > 8 * tests : add ATTN tests * metal : disable buffer allocation logs * tests : more * metal : faster inner loop for C == 32 * metal : fix array initialization * tests : ifdef * ggml : switch to padded F16 mask for ggml_soft_max, ggml_flash_attn_ext * ggml : fix ggml_soft_max mask requirement * cuda : fix soft_max to use correct mask size * cuda : add flash_attn kernel (wip) * metal : optimize softmax for C > 32 * metal : optimize softmax * tests : minor fix * cuda : avoid zeroing fragments * tests : update dims * cuda : fix __hisinf() result check * cuda : avoid warp_reduce for smax * cuda : use int instead of int64_t Noticeably improves performance (thanks to Johannes) * cuda : make loops use the same loop values Thanks Johannes again for the tip * cuda : unroll some of the loops * cuda : avoid __hisinf branches * cuda : use half2 in softmax * cuda : switch to 1 warp for bs > 16 * cuda : speed-up reduce part of the kernel * cuda : unroll Q*K^T loop * cuda : fix -INF block check * cuda : simplify softmax * cuda : fix matrix names * cuda : minor * llama : adapt to F16 KQ_pos * llama : adapt new models to F16 KQ_mask * ggml : fix F16 store (ARM NEON) * llama : fix type of KQ_mask and KQ_pos * ggml : fix CPU soft_max * tests : add hs=256 * cuda : fix build * metal : improve perf via smaller int registers * cuda : adapt soft_max to F16 mask and pos * CUDA: faster FlashAttention, kernel for bs == 1 * 16 cols for Phi-2 * no vec for hs, no hs==256 ncols==32 for Volta * adjust kernel selection logic * 4 warps, 256 stride for all D * no ncols == 64 * Multiple parallel blocks for batch size 1 * fix compile warnings * fix excessive KQ_b loads * fix cmake build * fix KV cache padding, NaN from INFINITY (#6438) * llama : flash_attn cparam + fix defrag * server: support flash_attn param * server: bench: enable flash_attn param * CUDA: refactor host code, dyn. par. blocks * fix flash_attn_vec_f16 race condition * flush softmax exp below threshold to 0 * store temp KQ in registers * Calculate KQ as FP32 if KQV has GGML_PREC_F32 * Add __hgt2_mask implementation for CUDA 11 * fix KQ FP32 precision fpr parallel_blocks > 1 * llama-bench : add -fa,--flash-attn arg * metal : add BS=1 kernel for flash attention (#6508) * metal : add BS=1 kernel for flash attention (wip) * metal : support more than 1 warps * metal : opts * metal : opt * metal : switch to parallel reduce * metal : reduce registers * metal : simplify * metal : initial FA vec kernel * metal : use F32 attention accumulators * batched-bench : add fattn arg * llama : simplify llama_build_kv_store ggml-ci * llama : adapt build_olmo to changes * ggml : fix arm fp16 store on windows * metal : clean-up * metal : clean-up kernel code * metal : minor * tests : remove benchmarks ggml-ci * ggml : fix avx512 const correctness ggml-ci * ggml : fix soft_max with bias on CPU ggml-ci * common : print --flash-attn in help * ggml : fix num dimensions in ggml_flash_attn_ext * llama : force disable flash attention for incompatible models * ggml : ggml_soft_max support F16/F32 mask/pos ggml-ci * cuda : uint -> uint32_t * cuda : "constexpr dim3" -> "const dim3" ggml-ci * cuda : try to fix __hgt2_mask ggml-ci * ggml : add TODO's for F16/F32 mask/pos support in other backends * llama : replace bool need_kq_pos with use_alibi * llama : prep ALiBi support for BERT models ggml-ci * llama : fix n_batch requirements ggml-ci * cont * server : add help for --flash-attn arg * llama : disable FA for AMD * tests : remove TMP_ATTN_BENCH ggml-ci * llama : support save/load state with FA enabled ggml-ci * ci : add CUDA save-load-state tests ggml-ci * llama : llama_kv_cache_clear zeroes data + fix save-load seq ggml-ci * llama : fix copy-paste errors, add TODO * llama : disallow incompatible states * llama : update llama_state_get_size after v_trans field * metal : remove tmp log * llama : add static reminder for llama_state_get_size * metal : fix max nsg ggml-ci * ci : fix arg order ggml-ci --------- Co-authored-by: Johannes Gäßler <johannesg@5d6.de> Co-authored-by: Pierrick HYMBERT <pierrick.hymbert@gmail.com>
564 lines
20 KiB
Plaintext
564 lines
20 KiB
Plaintext
#pragma once
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#include "ggml.h"
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#include "ggml-cuda.h"
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#include <memory>
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#if defined(GGML_USE_HIPBLAS)
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#define GGML_COMMON_DECL_HIP
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#define GGML_COMMON_IMPL_HIP
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#else
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#define GGML_COMMON_DECL_CUDA
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#define GGML_COMMON_IMPL_CUDA
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#endif
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#include "ggml-common.h"
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#include <cstdio>
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#include <array>
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#include <cassert>
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#include <cfloat>
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#include <string>
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#if defined(GGML_USE_HIPBLAS)
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#include <hip/hip_runtime.h>
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#include <hipblas/hipblas.h>
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#include <hip/hip_fp16.h>
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#ifdef __HIP_PLATFORM_AMD__
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// for rocblas_initialize()
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#include "rocblas/rocblas.h"
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#endif // __HIP_PLATFORM_AMD__
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#define CUBLAS_COMPUTE_16F HIPBLAS_R_16F
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#define CUBLAS_COMPUTE_32F HIPBLAS_R_32F
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#define CUBLAS_COMPUTE_32F_FAST_16F HIPBLAS_R_32F
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#define CUBLAS_GEMM_DEFAULT HIPBLAS_GEMM_DEFAULT
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#define CUBLAS_GEMM_DEFAULT_TENSOR_OP HIPBLAS_GEMM_DEFAULT
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#define CUBLAS_OP_N HIPBLAS_OP_N
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#define CUBLAS_OP_T HIPBLAS_OP_T
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#define CUBLAS_STATUS_SUCCESS HIPBLAS_STATUS_SUCCESS
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#define CUBLAS_TF32_TENSOR_OP_MATH 0
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#define CUDA_R_16F HIPBLAS_R_16F
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#define CUDA_R_32F HIPBLAS_R_32F
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#define __shfl_xor_sync(mask, var, laneMask, width) __shfl_xor(var, laneMask, width)
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#define cublasComputeType_t hipblasDatatype_t //deprecated, new hipblasComputeType_t not in 5.6
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#define cublasCreate hipblasCreate
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#define cublasDestroy hipblasDestroy
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#define cublasGemmEx hipblasGemmEx
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#define cublasGemmBatchedEx hipblasGemmBatchedEx
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#define cublasGemmStridedBatchedEx hipblasGemmStridedBatchedEx
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#define cublasHandle_t hipblasHandle_t
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#define cublasSetMathMode(handle, mode) CUBLAS_STATUS_SUCCESS
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#define cublasSetStream hipblasSetStream
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#define cublasSgemm hipblasSgemm
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#define cublasStatus_t hipblasStatus_t
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#define cudaDataType_t hipblasDatatype_t //deprecated, new hipblasDatatype not in 5.6
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#define cudaDeviceCanAccessPeer hipDeviceCanAccessPeer
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#define cudaDeviceDisablePeerAccess hipDeviceDisablePeerAccess
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#define cudaDeviceEnablePeerAccess hipDeviceEnablePeerAccess
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#define cudaDeviceProp hipDeviceProp_t
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#define cudaDeviceSynchronize hipDeviceSynchronize
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#define cudaError_t hipError_t
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#define cudaErrorPeerAccessAlreadyEnabled hipErrorPeerAccessAlreadyEnabled
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#define cudaErrorPeerAccessNotEnabled hipErrorPeerAccessNotEnabled
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#define cudaEventCreateWithFlags hipEventCreateWithFlags
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#define cudaEventDisableTiming hipEventDisableTiming
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#define cudaEventRecord hipEventRecord
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#define cudaEventSynchronize hipEventSynchronize
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#define cudaEvent_t hipEvent_t
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#define cudaEventDestroy hipEventDestroy
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#define cudaFree hipFree
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#define cudaFreeHost hipHostFree
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#define cudaGetDevice hipGetDevice
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#define cudaGetDeviceCount hipGetDeviceCount
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#define cudaGetDeviceProperties hipGetDeviceProperties
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#define cudaGetErrorString hipGetErrorString
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#define cudaGetLastError hipGetLastError
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#define cudaHostRegister hipHostRegister
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#define cudaHostRegisterPortable hipHostRegisterPortable
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#define cudaHostRegisterReadOnly hipHostRegisterReadOnly
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#define cudaHostUnregister hipHostUnregister
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#define cudaLaunchHostFunc hipLaunchHostFunc
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#ifdef GGML_HIP_UMA
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#define cudaMalloc hipMallocManaged
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#define cudaMallocHost(ptr, size) hipHostMalloc(ptr, size)
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#else
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#define cudaMalloc hipMalloc
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#define cudaMallocHost(ptr, size) hipHostMalloc(ptr, size, hipHostMallocDefault)
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#endif
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#define cudaMemcpy hipMemcpy
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#define cudaMemcpyAsync hipMemcpyAsync
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#define cudaMemcpyPeerAsync hipMemcpyPeerAsync
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#define cudaMemcpy2DAsync hipMemcpy2DAsync
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#define cudaMemcpyDeviceToDevice hipMemcpyDeviceToDevice
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#define cudaMemcpyDeviceToHost hipMemcpyDeviceToHost
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#define cudaMemcpyHostToDevice hipMemcpyHostToDevice
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#define cudaMemcpyKind hipMemcpyKind
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#define cudaMemset hipMemset
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#define cudaMemsetAsync hipMemsetAsync
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#define cudaMemGetInfo hipMemGetInfo
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#define cudaOccupancyMaxPotentialBlockSize hipOccupancyMaxPotentialBlockSize
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#define cudaSetDevice hipSetDevice
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#define cudaStreamCreateWithFlags hipStreamCreateWithFlags
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#define cudaStreamDestroy hipStreamDestroy
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#define cudaStreamFireAndForget hipStreamFireAndForget
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#define cudaStreamNonBlocking hipStreamNonBlocking
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#define cudaStreamPerThread hipStreamPerThread
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#define cudaStreamSynchronize hipStreamSynchronize
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#define cudaStreamWaitEvent(stream, event, flags) hipStreamWaitEvent(stream, event, flags)
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#define cudaStream_t hipStream_t
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#define cudaSuccess hipSuccess
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#define __trap abort
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#define CUBLAS_STATUS_SUCCESS HIPBLAS_STATUS_SUCCESS
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#define CUBLAS_STATUS_NOT_INITIALIZED HIPBLAS_STATUS_NOT_INITIALIZED
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#define CUBLAS_STATUS_ALLOC_FAILED HIPBLAS_STATUS_ALLOC_FAILED
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#define CUBLAS_STATUS_INVALID_VALUE HIPBLAS_STATUS_INVALID_VALUE
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#define CUBLAS_STATUS_ARCH_MISMATCH HIPBLAS_STATUS_ARCH_MISMATCH
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#define CUBLAS_STATUS_MAPPING_ERROR HIPBLAS_STATUS_MAPPING_ERROR
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#define CUBLAS_STATUS_EXECUTION_FAILED HIPBLAS_STATUS_EXECUTION_FAILED
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#define CUBLAS_STATUS_INTERNAL_ERROR HIPBLAS_STATUS_INTERNAL_ERROR
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#define CUBLAS_STATUS_NOT_SUPPORTED HIPBLAS_STATUS_NOT_SUPPORTED
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#else
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#include <cuda_runtime.h>
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#include <cuda.h>
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#include <cublas_v2.h>
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#include <cuda_fp16.h>
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#if CUDART_VERSION < 11020
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#define CU_DEVICE_ATTRIBUTE_VIRTUAL_MEMORY_MANAGEMENT_SUPPORTED CU_DEVICE_ATTRIBUTE_VIRTUAL_ADDRESS_MANAGEMENT_SUPPORTED
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#define CUBLAS_TF32_TENSOR_OP_MATH CUBLAS_TENSOR_OP_MATH
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#define CUBLAS_COMPUTE_16F CUDA_R_16F
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#define CUBLAS_COMPUTE_32F CUDA_R_32F
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#define cublasComputeType_t cudaDataType_t
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#endif // CUDART_VERSION < 11020
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#endif // defined(GGML_USE_HIPBLAS)
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#define STRINGIZE_IMPL(...) #__VA_ARGS__
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#define STRINGIZE(...) STRINGIZE_IMPL(__VA_ARGS__)
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#define WARP_SIZE 32
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#define CUDART_HMAX 11070 // CUDA 11.7, min. ver. for which __hmax and __hmax2 are known to work (may be higher than needed)
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#define CC_PASCAL 600
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#define MIN_CC_DP4A 610 // minimum compute capability for __dp4a, an intrinsic for byte-wise dot products
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#define CC_VOLTA 700
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#define CC_AMPERE 800
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#define CC_OFFSET_AMD 1000000
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#define CC_RDNA1 (CC_OFFSET_AMD + 1010)
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#define CC_RDNA2 (CC_OFFSET_AMD + 1030)
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#define CC_RDNA3 (CC_OFFSET_AMD + 1100)
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// define this if you want to always fallback to MMQ kernels and not use cuBLAS for matrix multiplication
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// on modern hardware, using cuBLAS is recommended as it utilizes F16 tensor cores which are very performant
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// for large computational tasks. the drawback is that this requires some extra amount of VRAM:
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// - 7B quantum model: +100-200 MB
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// - 13B quantum model: +200-400 MB
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//
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//#define GGML_CUDA_FORCE_MMQ
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// TODO: improve this to be correct for more hardware
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// for example, currently fails for GeForce GTX 1660 which is TURING arch (> VOLTA) but does not have tensor cores
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#if !defined(GGML_CUDA_FORCE_MMQ)
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#define CUDA_USE_TENSOR_CORES
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#endif
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#define MMVQ_MAX_BATCH_SIZE 8 // max batch size to use MMVQ kernels
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#define MMQ_MAX_BATCH_SIZE 32 // max batch size to use MMQ kernels when tensor cores are available
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#define MATRIX_ROW_PADDING 512 // last row of quant. matrices is a multiple of this to avoid out-of-bounds memory accesses
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#if defined(_MSC_VER)
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#pragma warning(disable: 4244 4267) // possible loss of data
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#endif
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#define GGML_CUDA_MAX_STREAMS 8
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[[noreturn]]
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void ggml_cuda_error(const char * stmt, const char * func, const char * file, int line, const char * msg);
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#define CUDA_CHECK_GEN(err, success, error_fn) \
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do { \
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auto err_ = (err); \
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if (err_ != (success)) { \
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ggml_cuda_error(#err, __func__, __FILE__, __LINE__, error_fn(err_)); \
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} \
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} while (0)
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#define CUDA_CHECK(err) CUDA_CHECK_GEN(err, cudaSuccess, cudaGetErrorString)
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#if CUDART_VERSION >= 12000
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static const char * cublas_get_error_str(const cublasStatus_t err) {
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return cublasGetStatusString(err);
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}
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#else
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static const char * cublas_get_error_str(const cublasStatus_t err) {
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switch (err) {
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case CUBLAS_STATUS_SUCCESS: return "CUBLAS_STATUS_SUCCESS";
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case CUBLAS_STATUS_NOT_INITIALIZED: return "CUBLAS_STATUS_NOT_INITIALIZED";
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case CUBLAS_STATUS_ALLOC_FAILED: return "CUBLAS_STATUS_ALLOC_FAILED";
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case CUBLAS_STATUS_INVALID_VALUE: return "CUBLAS_STATUS_INVALID_VALUE";
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case CUBLAS_STATUS_ARCH_MISMATCH: return "CUBLAS_STATUS_ARCH_MISMATCH";
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case CUBLAS_STATUS_MAPPING_ERROR: return "CUBLAS_STATUS_MAPPING_ERROR";
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case CUBLAS_STATUS_EXECUTION_FAILED: return "CUBLAS_STATUS_EXECUTION_FAILED";
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case CUBLAS_STATUS_INTERNAL_ERROR: return "CUBLAS_STATUS_INTERNAL_ERROR";
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case CUBLAS_STATUS_NOT_SUPPORTED: return "CUBLAS_STATUS_NOT_SUPPORTED";
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default: return "unknown error";
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}
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}
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#endif // CUDART_VERSION >= 12000
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#define CUBLAS_CHECK(err) CUDA_CHECK_GEN(err, CUBLAS_STATUS_SUCCESS, cublas_get_error_str)
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#if !defined(GGML_USE_HIPBLAS)
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static const char * cu_get_error_str(CUresult err) {
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const char * err_str;
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cuGetErrorString(err, &err_str);
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return err_str;
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}
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#define CU_CHECK(err) CUDA_CHECK_GEN(err, CUDA_SUCCESS, cu_get_error_str)
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#endif
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#if CUDART_VERSION >= 11100
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#define GGML_CUDA_ASSUME(x) __builtin_assume(x)
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#else
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#define GGML_CUDA_ASSUME(x)
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#endif // CUDART_VERSION >= 11100
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#ifdef GGML_CUDA_F16
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typedef half dfloat; // dequantize float
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typedef half2 dfloat2;
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#else
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typedef float dfloat; // dequantize float
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typedef float2 dfloat2;
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#endif //GGML_CUDA_F16
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[[noreturn]]
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static __device__ void no_device_code(
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const char * file_name, const int line, const char * function_name, const int arch, const char * arch_list) {
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#if defined(GGML_USE_HIPBLAS) && defined(__HIP_PLATFORM_AMD__)
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printf("%s:%d: ERROR: HIP kernel %s has no device code compatible with HIP arch %d.\n",
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file_name, line, function_name, arch);
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GGML_UNUSED(arch_list);
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#else
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printf("%s:%d: ERROR: CUDA kernel %s has no device code compatible with CUDA arch %d. ggml-cuda.cu was compiled for: %s\n",
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file_name, line, function_name, arch, arch_list);
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#endif // defined(GGML_USE_HIPBLAS) && defined(__HIP_PLATFORM_AMD__)
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__trap();
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GGML_UNUSED(no_device_code); // suppress unused function warning
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}
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#ifdef __CUDA_ARCH__
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#define NO_DEVICE_CODE no_device_code(__FILE__, __LINE__, __FUNCTION__, __CUDA_ARCH__, STRINGIZE(__CUDA_ARCH_LIST__))
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#else
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#define NO_DEVICE_CODE //GGML_ASSERT(false && "NO_DEVICE_CODE not valid in host code.")
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#endif // __CUDA_ARCH__
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static __device__ __forceinline__ float warp_reduce_sum(float x) {
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#pragma unroll
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for (int mask = 16; mask > 0; mask >>= 1) {
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x += __shfl_xor_sync(0xffffffff, x, mask, 32);
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}
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return x;
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}
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static __device__ __forceinline__ float2 warp_reduce_sum(float2 a) {
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#pragma unroll
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for (int mask = 16; mask > 0; mask >>= 1) {
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a.x += __shfl_xor_sync(0xffffffff, a.x, mask, 32);
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a.y += __shfl_xor_sync(0xffffffff, a.y, mask, 32);
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}
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return a;
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}
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static __device__ __forceinline__ half2 warp_reduce_sum(half2 a) {
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#if !(defined(GGML_USE_HIPBLAS) && defined(__HIP_PLATFORM_AMD__)) && __CUDA_ARCH__ >= CC_PASCAL
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#pragma unroll
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for (int mask = 16; mask > 0; mask >>= 1) {
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a = __hadd2(a, __shfl_xor_sync(0xffffffff, a, mask, 32));
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}
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return a;
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#else
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GGML_UNUSED(a);
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NO_DEVICE_CODE;
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#endif // !(defined(GGML_USE_HIPBLAS) && defined(__HIP_PLATFORM_AMD__)) && __CUDA_ARCH__ >= CC_PASCAL
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}
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static __device__ __forceinline__ float warp_reduce_max(float x) {
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#pragma unroll
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for (int mask = 16; mask > 0; mask >>= 1) {
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x = fmaxf(x, __shfl_xor_sync(0xffffffff, x, mask, 32));
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}
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return x;
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}
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static __device__ __forceinline__ half2 warp_reduce_max(half2 x) {
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#if !(defined(GGML_USE_HIPBLAS) && defined(__HIP_PLATFORM_AMD__)) && __CUDA_ARCH__ >= CC_PASCAL && CUDART_VERSION >= CUDART_HMAX
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#pragma unroll
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for (int mask = 16; mask > 0; mask >>= 1) {
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x = __hmax2(x, __shfl_xor_sync(0xffffffff, x, mask, 32));
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}
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return x;
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#else
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GGML_UNUSED(x);
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NO_DEVICE_CODE;
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#endif // !(defined(GGML_USE_HIPBLAS) && defined(__HIP_PLATFORM_AMD__)) && __CUDA_ARCH__ >= CC_PASCAL && CUDART_VERSION >= CUDART_HMAX
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}
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#if CUDART_VERSION < 12000
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static __device__ __forceinline__ uint32_t __hgt2_mask(const half2 a, const half2 b) {
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const uint32_t mask_low = 0x0000FFFF * (float( __low2half(a)) > float( __low2half(b)));
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const uint32_t mask_high = 0xFFFF0000 * (float(__high2half(a)) > float(__high2half(b)));
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return mask_low | mask_high;
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}
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#endif // CUDART_VERSION < 12000
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#if defined(GGML_USE_HIPBLAS)
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#define __CUDA_ARCH__ 1300
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#if defined(__gfx1100__) || defined(__gfx1101__) || defined(__gfx1102__) || defined(__gfx1103__) || \
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defined(__gfx1150__) || defined(__gfx1151__)
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#define RDNA3
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#endif
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#if defined(__gfx1030__) || defined(__gfx1031__) || defined(__gfx1032__) || defined(__gfx1033__) || \
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defined(__gfx1034__) || defined(__gfx1035__) || defined(__gfx1036__) || defined(__gfx1037__)
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#define RDNA2
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#endif
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#ifndef __has_builtin
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#define __has_builtin(x) 0
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#endif
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typedef int8_t int8x4_t __attribute__((ext_vector_type(4)));
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typedef uint8_t uint8x4_t __attribute__((ext_vector_type(4)));
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static __device__ __forceinline__ int __vsubss4(const int a, const int b) {
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const int8x4_t va = reinterpret_cast<const int8x4_t&>(a);
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const int8x4_t vb = reinterpret_cast<const int8x4_t&>(b);
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#if __has_builtin(__builtin_elementwise_sub_sat)
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const int8x4_t c = __builtin_elementwise_sub_sat(va, vb);
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return reinterpret_cast<const int &>(c);
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#else
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int8x4_t c;
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int16_t tmp;
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#pragma unroll
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for (int i = 0; i < 4; i++) {
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tmp = va[i] - vb[i];
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if(tmp > std::numeric_limits<int8_t>::max()) tmp = std::numeric_limits<int8_t>::max();
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if(tmp < std::numeric_limits<int8_t>::min()) tmp = std::numeric_limits<int8_t>::min();
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c[i] = tmp;
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}
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return reinterpret_cast<int &>(c);
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#endif // __has_builtin(__builtin_elementwise_sub_sat)
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}
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static __device__ __forceinline__ int __vsub4(const int a, const int b) {
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return __vsubss4(a, b);
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}
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static __device__ __forceinline__ unsigned int __vcmpeq4(unsigned int a, unsigned int b) {
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const uint8x4_t& va = reinterpret_cast<const uint8x4_t&>(a);
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const uint8x4_t& vb = reinterpret_cast<const uint8x4_t&>(b);
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unsigned int c;
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uint8x4_t& vc = reinterpret_cast<uint8x4_t&>(c);
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#pragma unroll
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for (int i = 0; i < 4; ++i) {
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vc[i] = va[i] == vb[i] ? 0xff : 0x00;
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}
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return c;
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}
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static __device__ __forceinline__ int __dp4a(const int a, const int b, int c) {
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#if defined(__gfx906__) || defined(__gfx908__) || defined(__gfx90a__) || defined(__gfx1030__)
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c = __builtin_amdgcn_sdot4(a, b, c, false);
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#elif defined(RDNA3)
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c = __builtin_amdgcn_sudot4( true, a, true, b, c, false);
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#elif defined(__gfx1010__) || defined(__gfx900__)
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int tmp1;
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int tmp2;
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asm("\n \
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v_mul_i32_i24 %1, sext(%3), sext(%4) dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:BYTE_0 \n \
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v_mul_i32_i24 %2, sext(%3), sext(%4) dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_1 src1_sel:BYTE_1 \n \
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v_add3_u32 %0, %1, %2, %0 \n \
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v_mul_i32_i24 %1, sext(%3), sext(%4) dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_2 src1_sel:BYTE_2 \n \
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v_mul_i32_i24 %2, sext(%3), sext(%4) dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_3 src1_sel:BYTE_3 \n \
|
|
v_add3_u32 %0, %1, %2, %0 \n \
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|
"
|
|
: "+v"(c), "=&v"(tmp1), "=&v"(tmp2)
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|
: "v"(a), "v"(b)
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|
);
|
|
#else
|
|
const int8x4_t va = reinterpret_cast<const int8x4_t&>(a);
|
|
const int8x4_t vb = reinterpret_cast<const int8x4_t&>(b);
|
|
c += va[0] * vb[0] + va[1] * vb[1] + va[2] * vb[2] + va[3] * vb[3];
|
|
#endif
|
|
return c;
|
|
}
|
|
#endif // defined(GGML_USE_HIPBLAS)
|
|
|
|
#define FP16_AVAILABLE defined(GGML_USE_HIPBLAS) && defined(__HIP_PLATFORM_AMD__) ? \
|
|
defined(RDNA1) || defined(RDNA2) || defined(RDNA3) : __CUDA_ARCH__ >= CC_PASCAL
|
|
|
|
#define FP16_MMA_AVAILABLE !(defined(GGML_USE_HIPBLAS) && defined(__HIP_PLATFORM_AMD__)) && __CUDA_ARCH__ >= CC_VOLTA
|
|
|
|
// TODO: move to ggml-common.h
|
|
static const __device__ int8_t kvalues_iq4nl[16] = {-127, -104, -83, -65, -49, -35, -22, -10, 1, 13, 25, 38, 53, 69, 89, 113};
|
|
|
|
typedef void (*dequantize_kernel_t)(const void * vx, const int64_t ib, const int iqs, dfloat2 & v);
|
|
|
|
|
|
//////////////////////
|
|
|
|
struct ggml_cuda_device_info {
|
|
int device_count;
|
|
|
|
struct cuda_device_info {
|
|
int cc; // compute capability
|
|
int nsm; // number of streaming multiprocessors
|
|
size_t smpb; // max. shared memory per block
|
|
bool vmm; // virtual memory support
|
|
size_t vmm_granularity; // granularity of virtual memory
|
|
size_t total_vram;
|
|
};
|
|
|
|
cuda_device_info devices[GGML_CUDA_MAX_DEVICES] = {};
|
|
|
|
std::array<float, GGML_CUDA_MAX_DEVICES> default_tensor_split = {};
|
|
};
|
|
|
|
const ggml_cuda_device_info & ggml_cuda_info();
|
|
|
|
void ggml_cuda_set_device(int device);
|
|
int ggml_cuda_get_device();
|
|
|
|
struct ggml_cuda_pool {
|
|
virtual ~ggml_cuda_pool() = default;
|
|
|
|
virtual void * alloc(size_t size, size_t * actual_size) = 0;
|
|
virtual void free(void * ptr, size_t size) = 0;
|
|
};
|
|
|
|
template<typename T>
|
|
struct ggml_cuda_pool_alloc {
|
|
ggml_cuda_pool * pool = nullptr;
|
|
T * ptr = nullptr;
|
|
size_t actual_size = 0;
|
|
|
|
ggml_cuda_pool_alloc() = default;
|
|
|
|
explicit ggml_cuda_pool_alloc(ggml_cuda_pool & pool) : pool(&pool) {
|
|
}
|
|
|
|
ggml_cuda_pool_alloc(ggml_cuda_pool & pool, size_t size) : pool(&pool) {
|
|
alloc(size);
|
|
}
|
|
|
|
~ggml_cuda_pool_alloc() {
|
|
if (ptr != nullptr) {
|
|
pool->free(ptr, actual_size);
|
|
}
|
|
}
|
|
|
|
// size is in number of elements
|
|
T * alloc(size_t size) {
|
|
GGML_ASSERT(pool != nullptr);
|
|
GGML_ASSERT(ptr == nullptr);
|
|
ptr = (T *) pool->alloc(size * sizeof(T), &this->actual_size);
|
|
return ptr;
|
|
}
|
|
|
|
T * alloc(ggml_cuda_pool & pool, size_t size) {
|
|
this->pool = &pool;
|
|
return alloc(size);
|
|
}
|
|
|
|
T * get() {
|
|
return ptr;
|
|
}
|
|
|
|
ggml_cuda_pool_alloc(const ggml_cuda_pool_alloc &) = delete;
|
|
ggml_cuda_pool_alloc(ggml_cuda_pool_alloc &&) = delete;
|
|
ggml_cuda_pool_alloc& operator=(const ggml_cuda_pool_alloc &) = delete;
|
|
ggml_cuda_pool_alloc& operator=(ggml_cuda_pool_alloc &&) = delete;
|
|
};
|
|
|
|
|
|
// backend interface
|
|
|
|
struct ggml_tensor_extra_gpu {
|
|
void * data_device[GGML_CUDA_MAX_DEVICES]; // 1 pointer for each device for split tensors
|
|
cudaEvent_t events[GGML_CUDA_MAX_DEVICES][GGML_CUDA_MAX_STREAMS]; // events for synchronizing multiple GPUs
|
|
};
|
|
|
|
struct ggml_backend_cuda_context {
|
|
int device;
|
|
std::string name;
|
|
cudaEvent_t copy_event = nullptr;
|
|
|
|
cudaStream_t streams[GGML_CUDA_MAX_DEVICES][GGML_CUDA_MAX_STREAMS] = { { nullptr } };
|
|
cublasHandle_t cublas_handles[GGML_CUDA_MAX_DEVICES] = {nullptr};
|
|
|
|
explicit ggml_backend_cuda_context(int device) :
|
|
device(device),
|
|
name(GGML_CUDA_NAME + std::to_string(device)) {
|
|
}
|
|
|
|
~ggml_backend_cuda_context() {
|
|
if (copy_event != nullptr) {
|
|
CUDA_CHECK(cudaEventDestroy(copy_event));
|
|
}
|
|
for (int i = 0; i < GGML_CUDA_MAX_DEVICES; ++i) {
|
|
for (int j = 0; j < GGML_CUDA_MAX_STREAMS; ++j) {
|
|
if (streams[i][j] != nullptr) {
|
|
CUDA_CHECK(cudaStreamDestroy(streams[i][j]));
|
|
}
|
|
}
|
|
if (cublas_handles[i] != nullptr) {
|
|
CUBLAS_CHECK(cublasDestroy(cublas_handles[i]));
|
|
}
|
|
}
|
|
}
|
|
|
|
cudaStream_t stream(int device, int stream) {
|
|
if (streams[device][stream] == nullptr) {
|
|
ggml_cuda_set_device(device);
|
|
CUDA_CHECK(cudaStreamCreateWithFlags(&streams[device][stream], cudaStreamNonBlocking));
|
|
}
|
|
return streams[device][stream];
|
|
}
|
|
|
|
cudaStream_t stream() {
|
|
return stream(device, 0);
|
|
}
|
|
|
|
cublasHandle_t cublas_handle(int device) {
|
|
if (cublas_handles[device] == nullptr) {
|
|
ggml_cuda_set_device(device);
|
|
CUBLAS_CHECK(cublasCreate(&cublas_handles[device]));
|
|
CUBLAS_CHECK(cublasSetMathMode(cublas_handles[device], CUBLAS_TF32_TENSOR_OP_MATH));
|
|
}
|
|
return cublas_handles[device];
|
|
}
|
|
|
|
cublasHandle_t cublas_handle() {
|
|
return cublas_handle(device);
|
|
}
|
|
|
|
// pool
|
|
std::unique_ptr<ggml_cuda_pool> pools[GGML_CUDA_MAX_DEVICES];
|
|
|
|
static std::unique_ptr<ggml_cuda_pool> new_pool_for_device(int device);
|
|
|
|
ggml_cuda_pool & pool(int device) {
|
|
if (pools[device] == nullptr) {
|
|
pools[device] = new_pool_for_device(device);
|
|
}
|
|
return *pools[device];
|
|
}
|
|
|
|
ggml_cuda_pool & pool() {
|
|
return pool(device);
|
|
}
|
|
};
|